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Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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If the uarchitectural evolution displayed in MLID s alleged leaked slide are accurate then the average IPC improvement cant be less than 22.47%, and could be as high as 28.75%, depending of the ability to keep a high ALUs duty rate, wich will be still lower than in Zen 4 anyway.
 
Well, some reasoned that the 40% SpecINT would also be representative of perf increase in general. Then some added possible 5+% clock bump on top of that. So we were at 40-45+% perf increase.
No we're not, it's really just you trying to setup a narrative.
The claim always was >40% per core in SpecInt (so basically even 40.01% would be satisfactory), 32% IPC.

Both claims leave very little wiggle room (the second one literally has none).
 
No we're not, it's really just you trying to setup a narrative.
The claim always was >40% per core in SpecInt (so basically even 40.01% would be satisfactory), 32% IPC.

Both claims leave very little wiggle room (the second one literally has none).
No, I’m just reiterating what has been speculated by others.

Note that I’m not saying that speculation was done by Kepler directly, just inherited from the 40% SpecINT and then built upon based on other additional info/guessing.
 
Zen 5 is now slower in IPC than Zen 1 or Intel Haswell. Enjoy the tears of disappointment and rage of everyone in this thread I will. Spoken in AI voice after reading thread. Zen 5 will be 40% faster and 40% slower than Zen 4 while matching Zen 4 and RL all the times it isn’t 40% faster and 40% slower. Rage 😡
 
No, I’m just reiterating what has been speculated by others.

Note that I’m not saying that speculation was done by Kepler directly, just inherited from the 40% SpecINT and then built upon based on other additional info/guessing.
You literally just said it earlier "Previously it was 40-45+%, what happened to that?" And from a couple of pages ago too.

It was only you, no one else. Dunno about others but this is so cringe. Just stop. Your posts are so foul that I'm actually sad someone actually posted that.
 
You literally just said it earlier "Previously it was 40-45+%, what happened to that?" And from a couple of pages ago too.

It was only you, no one else. Dunno about others but this is so cringe. Just stop. Your posts are so foul that I'm actually sad someone actually posted that.
You missed the 5+% clock bump speculation, and the reasoning that SpecINT would be representative of perf in general?
 
No, I just reiterated what has been mentioned/discussed/speculated by others previously.

No, you have conflated things.

We have very specific Specint 1t core for core and IPC claims. Either they hold up or not, we are yet to see. Beyond that there have been no substantive claims made. There has been talk about how AMD have done IPC geomeans in the past (get the Specint result and fit a set of benchmarks to that) and there has been talk that gaming does well although nothing specific and gaming uplifts are always game specific.

Trying to extend those 1t Specint claims to MT or to other workloads or even as a general uplift is disingenuous.
 
No, that's impossible. RDNA 3 is what it is, and it is unfixable.

Anyone thinking otherwise, is still falling for the same "hype".
so true, RDOA3.5% incoming.
That it happens to be 32% is a coincidence.
it's just Turin data.
Any tests? At what clock speed?
?
Interestingly, however, seeing an increase in only two points of the architecture from 6 to 8 (+33%) Dispatch/Rename and from 4 to 6 (+50%) ALU
Like the least relevant point about Zen5.
an average IPC increase of 40% is already assumed
That's not what I said.
And again, IPC isn't the interesting part.
The tough thing about chungus cores is clocking them at nice power, as our friends from Nuvia found out. The hard way!
because it is a "new project from scratch.
Yeah, has some really novel tricks in there.
If there is a small IPC gain after such a major redesign of the LionCove core and adding so many resources
Intel has been doing pretty dog on IPC:area since SNC.
How is this news?
 
Jim Keller: "Jumping on the next s-curve is always gonna be risky", or something like that
Just for context , Zen 4 was ~10-12% uplift with some minor tweaks versus Zen 3. If Zen 5 ends up being just 10-15% faster at iso clocks versus Zen 4*, then something went wrong in the design process. AMD has such advanced internal performance modeling tools that I find it impossible they would waste so much time and money to get so little out of it.
 
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Who speculated 40% IPC + 5% clock bump?
This thread is huge, and it's spread out. But it's discussed e.g. here:

SpecINT representative of average IPC:


If Zen 5 is indeed >40% uplift in ST SPECint (which is usually very close to Geekbench ST and the average IPC AMD reports) then this is quite a unique achievement.

Clock bump mentioned e.g. here:


AMD had Zen 5 samples running higher than 6 GHz. Not by much, but over 6 GHz.

And in other places, but you'll have to search for the rest yourself.
 
This thread is huge, and it's spread out. But it's discussed e.g. here:

SpecINT representative of average IPC:




Clock bump mentioned e.g. here:




And in other places, but you'll have to search for the rest yourself

Right, you’re talking different speculation from different people and putting them together to make all new speculation that no one else ever mentioned. That’s what people are complaining about.
 
Right, you’re talking different speculation from different people and putting them together to make all new speculation that no one else ever mentioned. That’s what people are complaining about.
No, not really. E.g. I just quoted this regarding SpecINT being very close to average IPC:
if Zen 5 is indeed >40% uplift in ST SPECint (which is usually very close to Geekbench ST and the average IPC AMD reports) then this is quite a unique achievement.
Not something I made up myself. Whether you agree with it or not, I'll leave that up to you.

Regarding whether the 5+% clock bump should be added on top or not, it is also something that has been discussed by others in the thread. Not made up by me.

But I don't really care what you think. If 40% sounds better to you than 45%, then go with that and be happy.
 
No, not really. E.g. I just quoted this regarding SpecINT being very close to average IPC:

Not something I made up myself. Whether you agree with it or not, I'll leave that up to you.

Regarding whether the 5+% clock bump should be added on top or not, it is also something that has been discussed by others in the thread. Not made up by me.

But I don't really care what you think. If 40% sounds better to you than 45%, then go with that and be happy.
You’re the only one I’ve seen that has treated the 40% as an IPC number and added a click bump on top of it, that’s why I addressed you directly and why people are saying you’re making up new numbers.

I personally have no idea what the final number is but only 2 people in the thread have said that they’ve seen actual numbers that I know of and they gave numbers of 32+% IPC and 40+% total performance respectively and both in SPEC int 1t. Both seem too high to me, but like I said, I really don’t know what the actual numbers are.
 
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itsmydamnation

"Amd has far more dry powder in terms of architectural resource consumption and they are about to spend it , amd kept up with Intel while doing it with a sizablely smaller core."

My theory is that Zen benefits greatly from the schedule and execution ports, separate for the FPU and separate for the ALU.
And this is additional logic and transistors.

Intel uses a unified scheduler and common execution ports for FPUs and ALUs up to the RedwoodCove microarchitecture.

Skylake
2xFP/ALU + 2xALU

Zen1-2
4xFPU, 4xALU

SunnyCove
3xFP/ALU + 1xALU

Zen3-4
6xFPU, 4xALU

GoldenCove
3xFP/ALU + 2xALU

LionCove
4xFPU, 6xALU

Zen5
6xFPU, 6xALU
 
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