Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[Bigos]

It is either wrong (a.k.a. "fake") or it says about the whole series and not about AM5 desktop CPUs.

Note that Raphael does not have "Navi 3.0" (whatever it is, I assume it meant RDNA3), it has RDNA2. But Ryzen 7000 series includes Phoenix which has RDNA3 - just not on desktop (yet).

Assuming this is not a fake and it speaks about the series, it just confirms that Ryzen 8000 series will have RDNA3.5, not that Zen 5 desktop CPUs will have it.

 

[igor_kavinski]

If it's really going to be annual cadence, then Zen 6 in 2025 and Zen 7 in 2026.

 

[Kepler_L2]

If it's really going to be annual cadence, then Zen 6 in 2025 and Zen 7 in 2026.

View attachment 85059

It's more complicated than that.

 

[CakeMonster]

With staggered releases of the lineups, X3D, and mobile parts, I'm sure AMD marketing are comfortable promising 'annual', even though it doesn't really mean anything.

 

[uzzi38]

I hear you, but there is this bit...

View attachment 85054

Source

That is quite clearly for APUs, unless you think Rapahel is RDNA3

 

[A///]

youtube auto play pushed an m lid video to me this morning while I was making my breaky. that giant chinned daft pinhead said some things that got the gears in my head wondering. it's still bs sleight of hand in voice but it does make you sit and ponder... more particularily because I realised he brought up something @Joe NYC keeps bringing up every so often. a 8c+16c die with zen 5 and zen 5c and then for the x3d version the 8c being replaced with the 8c with l3 glued on top. gotta give it to that big chinned dope who could tear up an asphalt runway just by resting his chin on it, he sure does make people think about their own ideas even if 99% of what he says is unfounded bs.

 

[A///]

It's more complicated than that.

Igor's been on a massive plantain binge. it's affecting his judgement forgetting tr, epyc and x3d and mobile lineups. be easy on him. he needs to come down from his banana high.

 

[Timorous]

youtube auto play pushed an m lid video to me this morning while I was making my breaky. that giant chinned daft pinhead said some things that got the gears in my head wondering. it's still bs sleight of hand in voice but it does make you sit and ponder... more particularily because I realised he brought up something @Joe NYC keeps bringing up every so often. a 8c+16c die with zen 5 and zen 5c and then for the x3d version the 8c being replaced with the 8c with l3 glued on top. gotta give it to that big chinned dope who could tear up an asphalt runway just by resting his chin on it, he sure does make people think about their own ideas even if 99% of what he says is unfounded bs.

Lots of people have said that it looks possible and the question is more around does AMD have the need/desire/market for such a product.

 

[A///]

7950X3D sold out for awhile. People were waiting for it.

Yep. cat was out of the bag for amd at that point. it was expected. the 8950x based on rumors should sell out like a house on fire.

x3d should also sell well.

 

[CakeMonster]

youtube auto play pushed an

You can block channels, either on your account or with an extension. It has helped by blood pressure immensely considering the direction YT is going.

 

[A///]

You can block channels, either on your account or with an extension. It has helped by blood pressure immensely considering the direction YT is going.

sometimes it's nice to listen to the child like rantings of a moron. It makes you feel more grounded in your own sanity.

 

[Joe NYC]

youtube auto play pushed an m lid video to me this morning while I was making my breaky. that giant chinned daft pinhead said some things that got the gears in my head wondering. it's still bs sleight of hand in voice but it does make you sit and ponder... more particularily because I realised he brought up something @Joe NYC keeps bringing up every so often. a 8c+16c die with zen 5 and zen 5c and then for the x3d version the 8c being replaced with the 8c with l3 glued on top. gotta give it to that big chinned dope who could tear up an asphalt runway just by resting his chin on it, he sure does make people think about their own ideas even if 99% of what he says is unfounded bs.

At least he admitted he was only speculating (like we all do here) and added some moderately convincing supporting info.

It's not out of the question that AMD would indeed release such a CPU. If the IOD can support such a configuration, the cost for AMD of adding such a CPU would be minimal.

And, it was mentioned that there would be a scenario where either regular 16c or combo of 8c + 8cVcache.

But that misses the point of how charts work. It's all about getting the longest bar in every category. Many people will overlook that it was SKU#1 that topped one chart, SKU#2 that topped chart 2, SKU#3 topped Chart 3. As long as all of the SKUs are released at the same time.

 

[adroc_thurston]

It's not out of the question that AMD would indeed release such a CPU

It is.

 

[A///]

At least he admitted he was only speculating (like we all do here) and added some moderately convincing supporting info.

It's not out of the question that AMD would indeed release such a CPU. If the IOD can support such a configuration, the cost for AMD of adding such a CPU would be minimal.

And, it was mentioned that there would be a scenario where either regular 16c or combo of 8c + 8cVcache.

But that misses the point of how charts work. It's all about getting the longest bar in every category. Many people will overlook that it was SKU#1 that topped one chart, SKU#2 that topped chart 2, SKU#3 topped Chart 3. As long as all of the SKUs are released at the same time.

the sob made some good points but you're forgetting something here. just cause it's possible don't mean they'll do it. ddr5 2ch cannot handle that kind of bandwidth the processor would create. mark peppermaker went into detail on this in a sit down interview.

 

[H433x0n]

It is.

Was wondering when you were going to chime in on it. Is it a compatibility issue or a bandwidth issue?

 

[Joe NYC]

It is.

What would be the reason?

I said "assuming" it works with the IOD. If it does, then the effort on part of AMD would be low.

It would not be a huge seller, but neither are regular x900x or x950x parts.

 

[adroc_thurston]

Is it a compatibility issue or a bandwidth issue?

The latter, feeding 24c Zen5 with SMT on a 2ch client platform is an idea so hilariously futile you'd rather not try.

 

[Hitman928]

The latter, feeding 24c Zen5 with SMT on a 2ch client platform is an idea so hilariously futile you'd rather not try.

But it will be a gaming leader and absolutely crush Cinebench, what else do you need in a consumer CPU? /s

 

[adroc_thurston]

But it will be a gaming leader and absolutely crush Cinebench, what else do you need in a consumer CPU? /s

So true.
MORE ATOMS

 

[A///]

So true.
MORE ATOMS

lf it helps intel make them feel like they're still relevant...

 

[HurleyBird]

The latter, feeding 24c Zen5 with SMT on a 2ch client platform is an idea so hilariously futile you'd rather not try.

the sob made some good points but you're forgetting something here. just cause it's possible don't mean they'll do it. ddr5 2ch cannot handle that kind of bandwidth the processor would create. mark peppermaker went into detail on this in a sit down interview.

Sorry, that's a big load of BS. Zen4 runs decently as low as DDR5 5200, while Zen5 should fairly easily run at DDR5 8000 or higher. A X3D CCD is far less bandwidth (and latency) sensitive than a non-V-cache CCD, and Zen5X3D should be noticeably less memory sensitive than regular Zen4. Zen5c is probably somewhere close to Zen4 in performance, but I'd guess may be a bit more memory sensitive depending on various factors (Zen5 architectural/lower level cache changes/whether we're still doing 2x 16MB L3s (probably) vs. a single 16-core CCX that shares the full 32MB).

But the point is, in a hypothetical part that mixes a Zen5X3D CCD with a Zen5c CCD, you're increasing core count by 50% and bandwidth by about the same via more mature DDR5. The important CCD (the X3D one) should be quite a bit less bandwidth sensitive than regular Zen4, while the c cores may be slightly more sensitive. Back of the napkin everything basically evens out. But even if it doesn't quite even out in the real world, being a little bit bandwidth constrained in some tasks is hardly going to make the product suck, it would just be slightly less awesome (with the potential of becoming more awesome in the future with newer AGESAs and even faster memory).

 

[adroc_thurston]

while Zen5 should fairly easily run at DDR5 8000 or higher.

What's the point when IFOPs.
Also it's the exact same cIOD, why would it run higher DDR freq.

 

[HurleyBird]

What's the point when IFOPs.

2 x DDR5 8000 == 128GB/s == 2 x 2000 MHz IF links.

Also it's the exact same cIOD, why would it run higher DDR freq.

Zen4 can already run 8000MHz with the latest AGESA. Buildzoid had a video earlier this month showing a 48GB XMP set that he was struggling to run on the Intel platform running easily on a B650E board (he did have more issues on a different board). Support is only going to improve in another 6 months or so + EXPO.

And no, it won't technically be the exact same IOD. At the very least silicon quality will be better with a more mature node. And even without a new IOD design, a new stepping is a possibility. Lastly, while I doubt AMD does much in the way of binning on the IOD currently, they certainly could if they wanted to for a halo part (Eg. bin for something like 2666MHz FCLK, which would give the same 1:3 ratio for DDR5 8000 that AMD recommends with DDR5 6000 on Zen 4).

 

[Joe NYC]

The latter, feeding 24c Zen5 with SMT on a 2ch client platform is an idea so hilariously futile you'd rather not try.

You are ignoring some solid - but non-technical arguments in favor:
- fun
- trolling

Intel designed its entire client architecture around Cinebench. Imagine, a throwaway SKU nullifying it.

 

[H433x0n]

You are ignoring some solid - but non-technical arguments in favor:
- fun
- trolling

Intel designed its entire client architecture around Cinebench. Imagine, a throwaway SKU nullifying it.

It’s a publicly traded company, they don’t do those types of things. The multi thread performance of the vanilla 8950X will already be very good (especially so for rendering tasks such as Cinebench).