Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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Josh128

Josh128

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Hulk said:
I have some questions regarding extrapolating clockspeed.

If Zen 5 runs at 5GHz, 200W, all cores loaded on a particular workload running 16/32, what clockspeed would a theoretical 24/48 Zen 5 on the same process node at 200W, running the same (perfectly MT scaling) workload run?

Core count is increased by 50% or a factor of 1.5. Assuming linear scaling that would give us a low estimate of 3.33GHz, correct? In reality, might that number be ~3.7GHz?

Assuming a 20% efficiency boost on the new node might we see 4.44GHz at 200W for Zen 6 for a similar workload?
Click to expand...
Hmm. 4.44GHz is awfully close to the 4.47GHz I predicted below @ 200W. 🤣 However, Im still telling you guys right now that near linear core speed scaling will not end at 200W and therefore AMD will not be putting out the 24C SKU with 200W default TDP. Im thinking the chip will readily continue to scale frequencies north of 300W but AMD has to stop it at some point. 230W-250W+ default TDP is a lock and may get you close to or slightly above 5GHz all core speeds. Keep in mind that presumably MUCH lower idle power draw makes such Zen 5 vs Zen 6 comparisons like comparing apples to oranges. Its because of this that I feel my prediction is very much on the conservative side.

For 24 core--
@200W :
41K*1.5 = 61,500 R23 nT
4.47 GHz average nT clockspeeds
Click to expand...
 
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Abwx

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Hulk said:
I have some questions regarding extrapolating clockspeed.

If Zen 5 runs at 5GHz, 200W, all cores loaded on a particular workload running 16/32, what clockspeed would a theoretical 24/48 Zen 5 on the same process node at 200W, running the same (perfectly MT scaling) workload run?

Core count is increased by 50% or a factor of 1.5. Assuming linear scaling that would give us a low estimate of 3.33GHz, correct? In reality, might that number be ~3.7GHz?

Assuming a 20% efficiency boost on the new node might we see 4.44GHz at 200W for Zen 6 for a similar workload?
Click to expand...
Power doesnt scale linearly with frequency, that s a fundamental characteristic of mosfet transistors that at best it scale close to a square of frequency within reasoneable clocks, from 4 to 5Ghz this is rather a 2.5 exponent, so that makes about 4.25GHz for a 24C Zen 5 to get to 200W assuming that the 16C clock at 5GHz for 200W.
 
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Hulk

Hulk

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Josh128 said:
Hmm. 4.44GHz is awfully close to the 4.47GHz I predicted below @ 200W. 🤣 However, Im still telling you guys right now that near linear core speed scaling will not end at 200W and therefore AMD will not be putting out the 24C SKU with 200W default TDP. Im thinking the chip will readily continue to scale frequencies north of 300W but AMD has to stop it at some point. 230W-250W+ default TDP is a lock and may get you close to or slightly above 5GHz all core speeds. Keep in mind that presumably MUCH lower idle power draw makes such Zen 5 vs Zen 6 comparisons like comparing apples to oranges. Its because of this that I feel my prediction is very much on the conservative side.
Click to expand...
Do you think 250W might be tough to cool with "regular Joe" cooling? I mean it seems like these cores are going to be really tiny, which makes them harder to cool.
 
Josh128

Josh128

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Hulk said:
Do you think 250W might be tough to cool with "regular Joe" cooling? I mean it seems like these cores are going to be really tiny, which makes them harder to cool.
Click to expand...
Despite the popular notion, calories x surface area x thermal conductivity are the only things that matter for heat dissipation/cooling. If you have a 1cm x 1cm piece of silicon, if it puts out X amount of calories of heat, it doesnt matter if its got 100K or 100B components taking up the surface area, if the contact surface has the same thermal conductivity, a given heatsink will dissipate the heat the same regardless. This is on a 2D plane. If you start increasing component count via 3D stacking, that changes things.
 
A

Abwx

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Josh128 said:
230W-250W+ default TDP is a lock and may get you close to or slightly above 5GHz all core speeds. Keep in mind that presumably MUCH lower idle power draw makes such Zen 5 vs Zen 6 comparisons like comparing apples to oranges. Its because of this that I feel my prediction is very much on the conservative side.
Click to expand...

230W is the max power of AM5, so that settle the question, there wont be 250W chips,
that would be too risky and a recipe for a disaster a la RPL with the difference that it would be the MBs that would bust.
 
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Hulk

Hulk

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Josh128 said:
Despite the popular notion, calories x surface area x thermal conductivity are the only things that matter for heat dissipation/cooling. If you have a 1cm x 1cm piece of silicon, if it puts out X amount of calories of heat, it doesnt matter if its got 100K or 100B components taking up the surface area, if the contact surface has the same thermal conductivity, a given heatsink will dissipate the heat the same regardless. This is on a 2D plane. If you start increasing component count via 3D stacking, that changes things.
Click to expand...
That assumes perfect thermal conductivity in the 1cm square. In the real world there will be hotspots.
 
Josh128

Josh128

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Abwx said:
230W is the max power of AM5, so that settle the question, there wont be 250W chips,
that would be too risky and a recipe for a disaster a la RPL with the difference that it would be the MBs that would bust.
Click to expand...
Then it will be 230W, but you will have all kinds of new mobos with crazy VRMs to allow for 300+ OCs.
 
Josh128

Josh128

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Not sure if I realized before and forgot and realized again, or if I mentioned it before, but the 9900X is roughly equal to the 2990WX in nT, and double in 1T. Pretty spiffy.

1762979216828.png
 
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Trovaricon

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Author of the blog misreports instance cost (if he is really running r8a.large & r8i.large) - intel instance is actually cheaper (same as for general purpose / or memory optimized instances fro both Sapphire & Granite Rapids vs. Zen4 & Zen5). It can easily happen because cost in instance type selection when creating new instance is randomly ordered for different OS ("vanilla" linux is cheapes, SuSe, RedHat, Ubuntu or Windows have higher prices - btw. its absurd UI fail)

The twist is, that while Genoa & Turin instances run with SMT being off (1 vCPU = 1 CPU core), Intel's instances are ran with SMT on - that is why they do not offer "medium" instance (1 vCPU) in intel's case but offer it for Zen4 & Zen8 instances. (1vCPu = 1Core is true for general purpose, compute or memory optimized - m/c/r 7&8 Zen4 and Zen5, it wasn't like that before - for Zen3- e.g. m6a)

Not that it changes the result, but the perception & interpretation correction is needed in my opinion. This is also the problem of comparing Azure vs AWS now, because Azure is running AMD Genoa & Turin instances with SMT on (2 vCPUs = 1c/2t).

1763370757086.png
1763370850725.png

see: https://docs.aws.amazon.com/AWSEC2/...stances-values.html#cpu-options-mem-optimized
 
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jpiniero

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Josh128

Josh128

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Gorgon Point gets L3 change? 3x 16MB?? This would be an upgrade from Strix Point if true, or is this just a misread by the software?? Almost certain this has to be an error in the software reporting as that could be a doubling of L3 vs Strix Point, huge change in silicon.

1763561919108.png
 
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CouncilorIrissa

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Josh128 said:
Gorgon Point gets L3 change? 3x 16MB?? This would be an upgrade from Strix Point if true, or is this just a misread by the software?? Almost certain this has to be an error in the software reporting as that could be a doubling of L3 vs Strix Point, huge change in silicon.

View attachment 134167
Click to expand...
100% software reading issue. Very common occasion for multi-cluster CPUs.
HX370 also has 3x 16MB according to SiS.
 
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ToTTenTranz

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Gorgon Point taking away the NPU to make the GPU run tensor ops instead and put Infinity Cache in the space left by the NPU would've been stuff from dreams.
 
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