Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[Gideon]

I really think hes just speculating / pulling that out of his arse. Personally I think there is .001% chance that they do that...UNLESS theyve figured out a way to UNIFY both CCDs across a single huge L3 and choose to do it this gen. I think the chances are even less of that though.

Why not? They would "waste" less X3D chiplets per CPU, but they'd literally leave performance on the table. Keep the scheduling issues (that are a dealebreaker for some). And keep the 7900X3D as a zombie unsellable CPU ...

There would be nothing special in having two X3D CCDs. They've done it in servers and it would behave as any other 12/16 core AM5 part.

Unifying could make (a little) sense if the 3D part were L4, but as it is all one big shared L3, the latency from CCD1 -> X3D -> CCD2 and back would be horrible for a L3.

Not to mention unifying 2 CCDs would only help desktop chips. Going through all that trouble only minimally helping the (surely upcoming) server parts, makes even less sense.

 

[Josh128]

Why not? They would "waste" less X3D chiplets per CPU, but they'd literally leave performance on the table. Keep the scheduling issues (that are a dealebreaker for some). And keep the 7900X3D as a zombie unsellable CPU ...

There would be nothing special in having two X3D CCDs. They've done it in servers and it would behave as any other 12/16 core AM5 part.

Unifying could make (a little) sense if the 3D part were L4, but as it is all one big shared L3, the latency from CCD1 -> X3D -> CCD2 and back would be horrible for a L3.

Not to mention unifying 2 CCDs would only help desktop chips. Going through all that trouble only minimally helping the (surely upcoming) server parts, makes even less sense.

Unless they unify the L3 across them, there would be zero gaming benefit, at the detriment of being a lot more expensive.

L3 latency would increase, but it should be far from "horrible". If the chiplets are layed out correctly, it would be not much worse than the latency of the L3 on the 16 core CCX on Zen 5c. If the chiplets are layed out as below with a single L3 SRAM die below them, there you have it. At worst, the latency would double from far core to far core/L3, but still about the same as if you had a single monolithic chip with one long L3 layout between the cores, which they do have. If you disagree, please refer to the figures below and explain why.

Im no CPU engineer, but I dont see how this is something that would not be quite possible, and quite beneficial, to make a killer CPU. It may not happen on AM5 due to pin layouts, etc, but I think it WILL happen eventually.

Theoretical 9950X3D:


Existing Zen 5c CCD

 

[In2Photos]

I really think hes just speculating / pulling that out of his arse. Personally I think there is .001% chance that they do that...UNLESS theyve figured out a way to UNIFY both CCDs across a single huge L3 and choose to do it this gen. I think the chances are even less of that though.

Being he was the only one I saw mention that I tend to agree he's speculating.

Why not? They would "waste" less X3D chiplets per CPU, but they'd literally leave performance on the table. Keep the scheduling issues (that are a dealebreaker for some). And keep the 7900X3D as a zombie unsellable CPU ...

There would be nothing special in having two X3D CCDs. They've done it in servers and it would behave as any other 12/16 core AM5 part.

Unifying could make (a little) sense if the 3D part were L4, but as it is all one big shared L3, the latency from CCD1 -> X3D -> CCD2 and back would be horrible for a L3.

Not to mention unifying 2 CCDs would only help desktop chips. Going through all that trouble only minimally helping the (surely upcoming) server parts, makes even less sense.

The only reason I can think NOT to add vcache to both CCDs is that it could hurt sales of non-X3D parts (not speaking to possible technical reasons). The 9800X3D kind of makes the 9700X pointless except the 9700X costs less. But if the 9800X3D out performs the 9700X in nearly all areas I think most would just go for the X3D version. But yields are less for X3D versions right? It takes more time to make the chips? This would reduce the amount of chips they could produce if they only sold X3D versions. If AMD could make the X3D chips compete with their non-X3D versions in non-gaming scenarios and dominate in gaming scenarios there's really no need for non-X3D versions, unless there's a big enough price gap.

 

[igor_kavinski]

Unless they unify the L3 across them, there would be zero gaming benefit, at the detriment of being a lot more expensive.

I believe this is what they will do and furthermore, since they tend to cheap out in consumer product scenarios, they will share a SINGLE 64MB V-cache die between the two CCDs, with half the V-cache on one CCD's L3 and the other half on the other.

Other "cheap" possibility is that they figure out how to unify the two L3 caches of the two CCDs and then stack a 64MB V-cache die at the bottom.

Third possibility of each CCD receiving its own V-cache die would just mean AMD splurging on consumer product for some very good reason like pricing 9950X3D at $999.

 

[Timorous]

Non 3d Zen 5 is not selling great in DIY.

$600 for the 9950X is not that much in the scheme of things. The cost to add 2 slices of cache, especially if the new design allows for wafer on wafer stacking, is probably a lot lot less than the amount they could upcharge for the fastest all around CPU money can buy.

 

[Josh128]

I believe this is what they will do and furthermore, since they tend to cheap out in consumer product scenarios, they will share a SINGLE 64MB V-cache die between the two CCDs, with half the V-cache on one CCD's L3 and the other half on the other.

Other "cheap" possibility is that they figure out how to unify the two L3 caches of the two CCDs and then stack a 64MB V-cache die at the bottom.

Third possibility of each CCD receiving its own V-cache die would just mean AMD splurging on consumer product for some very good reason like pricing 9950X3D at $999.

Single 64MB would be plenty when everything unified would give 128MB of L3. As you said, they are notorious for "cheaping out" on consumer stuff. I think they very much like to trickle or tip-toe tech down to consumer, which is why I believe they will still just aim low and make 9950X just like the 7950X with the only difference being the new L3 placement and clocks. I'd love to be wrong though.

 

[DAPUNISHER]

I have to say I really like the methodology of this Polish reviewer (use google translate if needed) on testing tuned settings and CPU bottlenecked scenarios:

@Gideon I don't know how I nerfed attribution here, but gratitude for turning me on to PurePC.

Why are some games ray tracing enabled, when it is widely known that it additionally burdens the graphics card? This is partly true, but the above statement is imprecise, because ray tracing also affects the CPU utilization. The relationship between CPU/GPU depends on the implementation of ray tracing in specific titles, because in some cases the GPU utilization can even drop, while the CPU load increases. For example - Spider Man Remastered, Hogwarts Legacy or Dying Light 2 practically do not change the relationship between components, although enabling ray tracing reduces the overall performance, which allows you to check the configurations in the most demanding scenario.

This is precisely what I have been ranting about for years now. Outstanding to see a reviewer treat testing like an experienced gamer. When you play games start to finish, and with various hardware and settings, you experience things reviews never reveal. As I've mentioned often, Assassins Creed Odyssey was the first time my CPU experience was a big departure from what reviews showed. 4770K at 4.5GHz? Terrible frame pacing in big fights with merc, soldiers, and citizens in Athens. Ryzen 2600 with PBO? Still some issues, though much less frequent or severe. Required a Ryzen 3600 with PBO to completely smooth things out.

Since that time, my experiences have continued to diverge from review results in games more and more frequently. Be it due to using the canned bench, or merely due to not playing the game long enough to get to the most CPU heavy sections and or scenarios. As an avid PC gamer, it's a big deal to me. I bookmarked the site and will turn off my ad blocker and click through a few times, as I support excellent content and testing methodology.

9800X3D has the mojo. Testing the more CPU demanding 3rd act in BG3 shows it takes a fairly powerful CPU to manage 60fps 1% lows. Not a damned thing the GPU or 4K can do to bail you out. Civ6, MMOs, factory games, flight and racing sims, park simulators that allow crazy guests numbers, the list goes on of games where the CPU used is important. The talking points about how this or that don't matter could be a buddy cop movie called Salt and Cope. Hell, late game in some of the Total War series can expose CPUs that look good on bar charts.

 

[Joe NYC]

No?
The main limitation for 1CCD parts (and 1t/8t perf in general) is GMI3-N link.

We will see how things change in Strix Halo, that will not have this bottleneck.

Or, overall, less memory bandwidth bottleneck.

 

[DAPUNISHER]

They must be the only reviewer showing the 9800X3D losing in Cyberpunk 2077.

GPU bound test area, that's all. They seem to get more right than wrong. They could have been lazy and ran the canned bench as some other reviewers did.

 

[Joe NYC]

Just a quick 9800x3d availability update:

Yesterday, all 5 Micro Center stores in NYC area started with 25+ stock counts, and all 5 sold out by mid afternoon.

Today, 4 of the 5 stores were re-stocked (around mid day) and are all 4 are showing with 25+ quantities in stock.

(25+ could be 26, could be 40, could be 50 or 100. We don't know)

 

[biostud]

Unless they unify the L3 across them, there would be zero gaming benefit, at the detriment of being a lot more expensive.

The pros for dual vcache CCD:
-Less scheduling issues
-Extra performance in memory bound work loads, which it seems like Zen5 could be
-Sell at a higher price for higher margins
-homogeneous EPYC for AM5

So is this the processor for anyone just looking to game? Obviously not.
Sure gamers who buy 5090 at release will also buy the 9950X3D at release.

But it is the processor for companies running game servers, who don't want no scheduling issues. It is for everyone who can take advantage of 16 cores for their software and also game.

 

[MrTeal]

Guy's will 9800x3d + b650E-E strix + T-force 2x24GB 8200mt/s cl38 bottleneck my 6800xt at 480p ?

I checked UserBenchmark, and they said you'll be heavily bottlenecked and should switch to an Ultra 5 245K.

 

[lightmanek]

The pros for dual vcache CCD:
-Less scheduling issues
-Extra performance in memory bound work loads, which it seems like Zen5 could be
-Sell at a higher price for higher margins
-homogeneous EPYC for AM5

So is this the processor for anyone just looking to game? Obviously not.
Sure gamers who buy 5090 at release will also buy the 9950X3D at release.

But it is the processor for companies running game servers, who don't want no scheduling issues. It is for everyone who can take advantage of 16 cores for their software and also game.

Lets just look how much better X3D Zen 5 is compared to standard Zen5 in productivity apps at the same clock.
Contrary to Zen4, there are substantial gains even in rendering apps like Cinema R24. Having one CCD which gains 15% thanks to extra 64MB cache and one vanilla CCD, both at the same clock, makes no sense to me.
Having 2 cache enabled CCDs is a receipt for productivity monster and I would pay $1k for such.

 

[OneEng2]

Only possible IF Zen 6 has more memory bandwidth available.

Latency is not the limiting factor, but bandwidth starts to be.

And that will possible ONLY with new socket.

I don't think it is the socket.

It isn't correct to say "Latency is not the limiting factor" since without context, it isn't true. Many (most) applications are much more latency bound than they are bandwidth bound.

MT applications of a certain type become memory bandwidth bound (like rendering video) as there is really no way to do anything cute other than move information into memory, process it, and move it out to memory/disk. It's really mostly a big memory pump with processing in the middle. Get enough processing going, and it is limited by bandwidth.

With AGESA updates, many people have gotten AM5 up to 8000MT/sec I understand. From what I can tell, the infinity fabric becomes the bottleneck, and this is on the processor, not the MB or socket so I see no reason that a future Zen 6 on AM5 couldn't do some serious bandwidth updates over the current Zen 5.

Finally, having a metric crap ton (it's an engineering term) of L3 cache can greatly reduce the amount of transfers needed from main memory in many applications ..... just not those that are essentially memory pumps .

If I am off base here, please someone calibrate me.

 

[Rigg]

Just a quick 9800x3d availability update:

Yesterday, all 5 Micro Center stores in NYC area started with 25+ stock counts, and all 5 sold out by mid afternoon.

Today, 4 of the 5 stores were re-stocked (around mid day) and are all 4 are showing with 25+ quantities in stock.

(25+ could be 26, could be 40, could be 50 or 100. We don't know)

They added a 9800X3D bundle yesterday. The CPU price is $80 more than the 7800X3D bundle price but still pretty cool they did this already. That didn't take long. Bundle is life!

 

[ju-rek]

PBO +200 and CO per core

 

[desrever]

I checked UserBenchmark, and they said you'll be heavily bottlenecked and should switch to an Ultra 5 245K.

or PCMag

 

[Hitman928]

or PCMag

Hmm, looking at the cons, there seems to be some pretty big inconsistencies. . .

 

[Glo.]

I don't think it is the socket.

It isn't correct to say "Latency is not the limiting factor" since without context, it isn't true. Many (most) applications are much more latency bound than they are bandwidth bound.

MT applications of a certain type become memory bandwidth bound (like rendering video) as there is really no way to do anything cute other than move information into memory, process it, and move it out to memory/disk. It's really mostly a big memory pump with processing in the middle. Get enough processing going, and it is limited by bandwidth.

With AGESA updates, many people have gotten AM5 up to 8000MT/sec I understand. From what I can tell, the infinity fabric becomes the bottleneck, and this is on the processor, not the MB or socket so I see no reason that a future Zen 6 on AM5 couldn't do some serious bandwidth updates over the current Zen 5.

Finally, having a metric crap ton (it's an engineering term) of L3 cache can greatly reduce the amount of transfers needed from main memory in many applications ..... just not those that are essentially memory pumps .

If I am off base here, please someone calibrate me.

I wasn't talking about software performance, but hardware bottlenecks. Latency on hardware level is not the problem with current tech. Bandwidth starts to be.

 

[Thunder 57]

or PCMag

What a chump. High power consumption? Compared to Intel? I wish somebody would slap some sense into him but I don't think its possible. Or rather, he knows he's being a shill but for reasons beyond me.

 

[ging1233]

PBO +200 and CO per core

View attachment 111309

hello are you gpu limited by any chance ? you can use capframex to see gpu usage thx

 

[poke01]

Zen 5 has been dethroned in Jetstream 2 by M4 Max, so anybody with a well tuned 9950X/9700X want to beat this score?
This was quite a big jump, M3 Max scored 311 in this test, slower than a 7950X

 

[exitorious]

Zen 5 has been dethroned in Jetstream 2 by M4 Max, so anybody with a well tuned 9950X/9700X want to beat this score?
This was quite a big jump, M3 Max scored 311 in this test, slower than a 7950X


View attachment 111317

This is whatever the bios defaults are on an Asus x670e creator with ddr6000 c28

 

[poke01]

This is whatever the bios defaults are on an Asus x670e creator with ddr6000 c28

great score, hopefully someone tests the M4 Max using Chrome/firefox so we get a more fairer test.

Its interesting see the progress on web performance these days, most people live on the web so its not that surprising to see the increased focus

 

[In2Photos]

I thought the intro to this video was worth a share.

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