Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[Fjodor2001]

So regarding the +40% SPEC increase from Zen4 to Zen5 core-to-core at same frequency, did we get any clarification on whether that's INT or FP? And where does the +40% number come from anyway?

Also, what's the relationship to average IPC increase? Is +40% average IPC increase also expected (when averaging results from complete suite of workloads in usual test suite)?

 

[Hitman928]

So regarding the +40% SPEC increase from Zen4 to Zen5 core-to-core at same frequency, did we get any clarification on whether that's INT or FP? And where does the +40% number come from anyway?

Also, what's the relationship to average IPC increase? Is +40% average IPC increase also expected (when averaging results from complete suite of workloads in usual test suite)?

It's SPECint, so should be pretty representative of an average INT increase. I don't think anyone has predicted FP yet, at least I haven't seen it, but with known increases in FPU resources, I imagine that it would be at least as large an increase. That's if the INT increase is accurate to begin with.

 

[gdansk]

He has explained his predictions already. Scroll up.

 

[adroc_thurston]

did we get any clarification on whether that's INT or FP?

I'm pretty sure SIR2017 stands for SpecINT rate 2017 but I digress.

And where does the +40% number come from anyway?

Mine are Turin socket scores, kekler is quoting Granite Ridge (probably).
I also know stx1 results but %redacted%.

Is +40% average IPC increase also expected (when averaging results from complete suite of workloads in usual test suite)?

yeah AMD SPEC bumps map very well to workloads actual.

 

[Goop_reformed]

If anything I want zen 5 ipc uplift to be so high Mild has to issue corrections every month leading up to launch date. I like his content but this is the holy grail fs.

 

[StefanR5R]

we can expect well parallelized fp (which spec has plenty of) to get a major boost, because simd execution width is doubled.

[...] expect well parallelized FP workloads which mostly fit into caches¹ to get a major boost [...]

AFAICT though, AMD's cache sizes are decent for a bunch of workloads.
________
¹) I don't know what the data footprints of benchmarks in the SPECrate® 2017 Floating Point suite in particular are. I suppose there are both smaller and bigger workloads represented, but at which bias?

 

[APU_Fusion]

So, now are +40% zen5 will go crush arrowlake gundham style

 

[igor_kavinski]

So, now are +40% zen5 will go crush arrowlake gundham style

Our resident Prince Harry expects Arrow Lake to hit 7 GHz!

Intel will RULE!!!

 

[gdansk]

The 'consensus' is at 24% performance improvement (1T) at about the same clock rate. This is lifted upwards by including Igor's fever dream 62% and other high predictions.

We'll see about the wisdom/delusion/ignorance of the crowd.

 

[Gideon]

if Zen 5 is indeed >40% uplift in ST SPECint (which is usually very close to Geekbench ST and the average IPC AMD reports) then this is quite a unique achievement.

The industry standard is about 20% IPC uplift for a new generation (usually on a new process with plenty more transistors).

~30% would already be way above the norm, ~40% (on essentially the same process) isn't even "once in a decade" thing, it's unprecedented in the x86 world in the last 2 decades, as AMDK11 already mentioned in detail (Core 2 and Zen 1 don't really apply).

>40% is about the same jump as going from Comet Lake (10900K) to Alder Lake (12900K), which is 2 Ticks + 2 Tocks (Skylake -> Cannon Lake -> Ice Lake -> Tiger Lake -> Alder Lake) which architecture-wise took Intel 6 years.

I can totally see how announcing this would Osborne the current lineup (as adroc mentioned).

I'd still like to see some actual leaks, before I'll start believing it (as extraordinary claims require extraordinary evidence) but it sure would be a refreshing change in the industry. One coupled with a lot of exciting architectural changes no-doubt.

 

[poke01]

if Zen 5 is indeed >40% uplift in ST SPECint (which is usually very close to Geekbench ST and the average IPC AMD reports) then this is quite a unique achievement.

The industry standard is about 20% IPC uplift for a new generation (usually on a new process with plenty more transistors).

~30% would already be way above the norm, ~40% (on essentially the same process) isn't even "once in a decade" thing, it's unprecedented in the x86 world in the last 2 decades, as AMDK11 already mentioned in detail (Core 2 and Zen 1 don't really apply).

>40% is about the same jump as going from Comet Lake (10900K) to Alder Lake (12900K), which is 2 Ticks + 2 Tocks (Skylake -> Cannon Lake -> Ice Lake -> Tiger Lake -> Alder Lake) which architecture-wise took Intel 6 years.

I can totally see how announcing this would Osborne the current lineup (as adroc mentioned).

I'd still like to see some actual leaks, before I'll start believing it (as extraordinary claims require extraordinary evidence) but it sure would be a refreshing change in the industry. One coupled with a lot of exciting architectural changes no-doubt.

Best thing about this if true would make the others also want to go for bigger leaps instead of the usual 10-20% improvements that we get.

 

[FlameTail]

Best thing about this if true would make the others also want to go for bigger leaps instead of the usual 10-20% improvements that we get.

So you are telling me the others have been holding back?

 

[SiliconFly]

Best thing about this if true would make the others also want to go for bigger leaps instead of the usual 10-20% improvements that we get.

I don't remember exactly. But either Lisa or Mark Papermaster said Zen5 will has a minimum of 15% IPC uplift. And they're usually very conservative. So, I guess we can expect 20% to 25%.

 

[carrotmania]

Best thing about this if true would make the others also want to go for bigger leaps instead of the usual 10-20% improvements that we get.

Other than alderlake, you added zeros when you really shouldn't. Intel gave us ~10 years of junk.

 

[S'renne]

if Zen 5 is indeed >40% uplift in ST SPECint (which is usually very close to Geekbench ST and the average IPC AMD reports) then this is quite a unique achievement.

The industry standard is about 20% IPC uplift for a new generation (usually on a new process with plenty more transistors).

~30% would already be way above the norm, ~40% (on essentially the same process) isn't even "once in a decade" thing, it's unprecedented in the x86 world in the last 2 decades, as AMDK11 already mentioned in detail (Core 2 and Zen 1 don't really apply).

>40% is about the same jump as going from Comet Lake (10900K) to Alder Lake (12900K), which is 2 Ticks + 2 Tocks (Skylake -> Cannon Lake -> Ice Lake -> Tiger Lake -> Alder Lake) which architecture-wise took Intel 6 years.

I can totally see how announcing this would Osborne the current lineup (as adroc mentioned).

I'd still like to see some actual leaks, before I'll start believing it (as extraordinary claims require extraordinary evidence) but it sure would be a refreshing change in the industry. One coupled with a lot of exciting architectural changes no-doubt.

I still don't trust him, as I doubt that Arrow Lake's leaks are set in stone so early, and its from 10nm to 3NB/20A, along with Skymont being mostly unknown for Arrow Lake

 

[Gideon]

In AMD history, only K7 was a bigger single-gen core iteration.
Expected.

This Anandtech "first impressions" K7 review was a nice "blast from the past" I hadn't actually read:

AMD Athlon

www.anandtech.com

The slotted CPU period truly was a crazy time! (I missed it completely, with my first modern CPU being Athlon 950 Mhz on Socket A, later replaced by an Athlon XP 2100+):

Spoiler: The MoBo

The sockets:

The MoBo:

I wish we still had gaming uplifts like this (at relevant resolutions) from CPU upgrades (K6-3 450 to Athlon is 1 gen):

 

[linkgoron]

So you are telling me the others have been holding back?

Companies can take less risks or "play it safe". For example, less higher-risk research avenues and experimental solutions, preferring smaller chips for higher margin, better mm^2/perf, cost-saving and using less complex solutions. They could also just be negligent, fat and lazy.

Before Zen1, Intel was content on keeping 6/8 core CPUs on HEDT and Xeon based CPUs. We were stuck on 4-core CPUs for a decade for "regular" desktop use. Coffee lake, released in October 2017, was the first non-HEDT to support six cores in desktop (Core 2 quad was released in January 2007).

 

[Gideon]

Other than alderlake, you added zeros when you really shouldn't. Intel gave us ~10 years of junk.

Yeah, well the Sandy Bridge -> Skylake era was indeed infamous in that regard, but Ice Lake also delivered a solid 20% IPC gain (coupled with almost identical clock-speed regression though). And ARM delivered double digit uplifts in IPC for a while, only slowing down recently.

Companies can take less risks or "play it safe". For example, less higher-risk research avenues and experimental solutions, preferring smaller chips for higher margin, better mm^2/perf, cost-saving and using less complex solutions. They could also just be negligent, fat and lazy.

Yeah. That was also why I hoped that AMD set a really aggressive IPC target for their "ground-up new" core (usually coming every 5-7 years). ~20% might seem great when going against the Intel of yesteryear, but they are also speeding up and are not the only competition in town.

Let's not forget that after every major redesign you usually have to iterate for at least 2-3 extra generations (with smaller uplifts each). So 20% might seem nice, but can rapidly age, if the competition is fierce.

Bulldozer to Excavator were already set in stone in 2011, despite the fact that the core was terrible (AMD signaled it early). Zen 1 was the absolute earliest AMD could have managed a new ground-up core, and it took 5-6 years. The same was true for Zen 1 -> Zen 4. While AMD managed to extract crazy amount of "low hanging" fruit there, the high-level architecture of Zen 4 is still shockingly similar to Zen 1, given the performance differences.

 

[yuri69]

>40% is about the same jump as going from Comet Lake (10900K) to Alder Lake (12900K), which is 2 Ticks + 2 Tocks (Skylake -> Cannon Lake -> Ice Lake -> Tiger Lake -> Alder Lake) which architecture-wise took Intel 6 years.

AMD was working on Zen 5 back in April 2018. That's over 6 years. So far so good.

Just note the 40% core-to-core SPECint figure *might* come from a 64-128c server part.

That'd be a completely different realm compared to 8-16c desktop. The scope of many-core server is quite wild. Zen 5 features a new sIOD and probably a different approach to solving various perf scaling problems (like different coherency protocols), etc.

 

[FlameTail]

Apple vs ARM vs Nuvia vs AMD vs Intel

Let the Hunger Games begin.

 

[Gideon]

AMD was working on Zen 5 back in April 2018. That's over 6 years. So far so good.

While true, this was 6 years for a (potential) 40% IPC uplift "gen-on-gen" vs 6 years for a 20% uplift gen-on-gen

 

[DAPUNISHER]

I wish we still had gaming uplifts like this (at relevant resolutions) from CPU upgrades (K6-3 450 to Athlon is 1 gen):

That article got my friend @xeno2060 to buy the slot A Athlon 700. I think he added active cooling and a gold finger to overclock? Been way too long to remember that stuff. But there was that kind of performance uplift in other generations too. The last one was probably FX to Ryzen. Near double the performance between a FX 9590 and a 1800X is possible in some games.

 

[Kaffeekenan]

AMD was working on Zen 5 back in April 2018. That's over 6 years. So far so good.

Just note the 40% core-to-core SPECint figure *might* come from a 64-128c server part.

That'd be a completely different realm compared to 8-16c desktop. The scope of many-core server is quite wild. Zen 5 features a new sIOD and probably a different approach to solving various perf scaling problems (like different coherency protocols), etc.

No, he said "core to core"!!

 

[inf64]

I don't remember exactly. But either Lisa or Mark Papermaster said Zen5 will has a minimum of 15% IPC uplift. And they're usually very conservative. So, I guess we can expect 20% to 25%.

I think you dreamt that. Nobody from AMD made any public comments on the IPC increase in Zen 5.

 

[reggie_fils_aime]

I'd be more likely to believe the 40% uplift for Epyc chips, they're trying to throttle whatever hail mary intel is trying to cook up after Emerald Rapids. If we get half that for Ryzen, I'd be thrilled (and lining up for a 9900x)