Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[jpiniero]

MS just announced a new Surface Laptop. Raptor Lake i7 H + 4050 or 4060. The previous model had an AMD option but this one doesn't. Maybe they will add a Strix Halo option?

 

[Joe NYC]

MS just announced a new Surface Laptop. Raptor Lake i7 H + 4050 or 4060. The previous model had an AMD option but this one doesn't. Maybe they will add a Strix Halo option?

There has not been an AMD option on Surface for more than a generation. Microsoft completely skipped Rembrandt and now Phoenix.

 

[PJVol]

RedGamingTech put out another Zen 5 video on YouTube without any new info, so don't waste your time

Spoiler

 

[DisEnchantment]

With all the chatter of frequency regression with Zen 5, a 300-400 MHz frequency regression would make it the weakest improvement for a Zen generation ever even with a fat 25% IPC gain. They have to keep same clocks otherwise the would need an impossibly high 35%+ IPC gain just to match the Zen 4 perf gains.
Doubtful Zen 5 can repeat the ~27% ST perf gain of Zen 4 with a clock regression. Couple that with FCLK plateauing from supposed 'same IOD' rumors.

On the other hand, at lower clocks efficiency should be greatly improved.

 

[soresu]

View attachment 86136

With all the chatter of frequency regression with Zen 5, a 300-400 MHz frequency regression would make it the weakest improvement for a Zen generation ever even with a fat 25% IPC gain. They have to keep same clocks otherwise the would need an impossibly high 35%+ IPC gain just to match the Zen 4 perf gains.
Doubtful Zen 5 can repeat the ~27% ST perf gain of Zen 4 with a clock regression. Couple that with FCLK plateauing from supposed 'same IOD' rumors.

On the other hand, at lower clocks efficiency should be greatly improved.

To be honest I'm less interested in improving clocks if it leads to more power draw and therefore more noise from the fans.

I'd rather just keep the core at a more ideal part of the frequency bell curve unless I'm not going to be in my house for a day or more.

 

[DisEnchantment]

To be honest I'm less interested in improving clocks if it leads to more power draw and therefore more noise from the fans.

I'd rather just keep the core at a more ideal part of the frequency bell curve unless I'm not going to be in my house for a day or more.

Same. But I understand people who want to push it to the limits. You can use thermal throttling on Zen 4. So we have choices.

If you use Thermal Limit on Zen 4 and keep it at 86 degrees, it can hit 5500 MHz on a 240mm AIO and I cannot hear a thing. The extra 250-300Mhz needed to compete cost a lot in power heat and noise.

 

[SpudLobby]

If Intel isn't getting any N3 stuff from TSMC until next year it will be N3E.

Yeah, no. Doug, they aren't design rule compatible. Same goes for the M3, I'd bet you it's going to be on N3B.

 

[SiliconFly]

Yeah, no. Doug, they aren't design rule compatible. Same goes for the M3, I'd bet you it's going to be on N3B.

Arrow lake gpu tile is on N3E i think.

 

[SpudLobby]

Arrow lake gpu tile is on N3E i think.

Really? Maybe it is far out enough then.

 

[Tigerick]

View attachment 86136

With all the chatter of frequency regression with Zen 5, a 300-400 MHz frequency regression would make it the weakest improvement for a Zen generation ever even with a fat 25% IPC gain. They have to keep same clocks otherwise the would need an impossibly high 35%+ IPC gain just to match the Zen 4 perf gains.
Doubtful Zen 5 can repeat the ~27% ST perf gain of Zen 4 with a clock regression. Couple that with FCLK plateauing from supposed 'same IOD' rumors.

On the other hand, at lower clocks efficiency should be greatly improved.

Hmm, guess this is the Zen 5's true picture, not as revolution as people claimed. So much for hype around here . So now we are expecting same 16-core Zen5 without changes on IOD (no changes on graphics engines and no AIE as well), how much prices are we willing to pay??? Definitely not $999

Better yet, AMD should revise pricing on the Zen5's lineup, what is the points of buying Zen5 if X3D version of Zen3 and 4 is cheaper and faster in gaming??? Furthermore, gamers are expecting X3D version of Zen5 half a year later. In my opinion, AMD should replace standard Zen5 with X3D version, maybe left standard 6-core version as sub-$300 CPU...

I am not sure about power efficiency of Zen5, since it is based on N4P process, maybe Zen6 will change that???

 

[Kepler_L2]

Hmm, guess this is the Zen 5's true picture, not as revolution as people claimed. So much for hype around here .

It's the best 2024 core, and probably 2025 as well unless Apple gets their act together. The hype is well deserved.

Profanity is not allowed in the technical forums. -AT Moderator Shmee

 

[Abwx]

View attachment 86136

With all the chatter of frequency regression with Zen 5, a 300-400 MHz frequency regression would make it the weakest improvement for a Zen generation ever even with a fat 25% IPC gain. They have to keep same clocks otherwise the would need an impossibly high 35%+ IPC gain just to match the Zen 4 perf gains.
Doubtful Zen 5 can repeat the ~27% ST perf gain of Zen 4 with a clock regression. Couple that with FCLK plateauing from supposed 'same IOD' rumors.

On the other hand, at lower clocks efficiency should be greatly improved.

ST frequency regression doesnt mean MT frequency regression as well, actually we may see a higher all cores boost due to a more efficient process, FI where it used to clock at 4.8-4.9 all cores it could get to 5.2-5.3GHz, so that would make for a 10% better MT perf without accounting IPC improvements.

That being said they better consider getting back to 105W TDP/142W PPT thermals, there s no advantage to push power that much, they are just falling in some Intel trap by validating high powers that end negating parts of their efficency advantage.

 

[Ajay]

View attachment 86136

With all the chatter of frequency regression with Zen 5, a 300-400 MHz frequency regression would make it the weakest improvement for a Zen generation ever even with a fat 25% IPC gain. They have to keep same clocks otherwise the would need an impossibly high 35%+ IPC gain just to match the Zen 4 perf gains.
Doubtful Zen 5 can repeat the ~27% ST perf gain of Zen 4 with a clock regression. Couple that with FCLK plateauing from supposed 'same IOD' rumors.

On the other hand, at lower clocks efficiency should be greatly improved.

And there's the Rub, Clark's enthusiasm was likely directed at EPYC servers, on desktop. Top clocks are less likely to regress there, and the IPC boost would put Zen5 Server CPUs in another league. Also, there may be optimizations for some work loads that will be a significant selling point in some markets. Unfortunately, we are stuck mainly with rumors in wait and see mode. I don't know what the next public event is coming up where we might get a decent preview.

 

[PJVol]

ST frequency regression doesnt mean MT frequency regression as well

Where it was said (rumoured) it's ST freq. regression? What's the point of limiting ST clock?

 

[Fjodor2001]

ST frequency regression doesnt mean MT frequency regression as well, actually we may see a higher all cores boost due to a more efficient process, FI where it used to clock at 4.8-4.9 all cores it could get to 5.2-5.3GHz, so that would make for a 10% better MT perf without accounting IPC improvements.

That being said they better consider getting back to 105W TDP/142W PPT thermals, there s no advantage to push power that much, they are just falling in some Intel trap by validating high powers that end negating parts of their efficency advantage.

Maybe have 105W for 16C Zen5 variants, and 170W for 24C Zen5 variants. And possibly 170W for 16C Zen5 + 16C Zen5C variants also. That is if we'll get such variants.

Would be more optimal w.r.t. efficiency like you said.

 

[Geddagod]

Arrow lake gpu tile is on N3E i think.

Is alchemist going to span 3 nodes? N6, N5, N3

 

[DrMrLordX]

Where it was said (rumoured) it's ST freq. regression? What's the point of limiting ST clock?

Might be due to something as simple as changes to cache latency.

 

[Abwx]

Where it was said (rumoured) it's ST freq. regression? What's the point of limiting ST clock?

Rumours of 200-300MHz regressions, but this cant be in MT since that s about impossible, it can only apply to ST if ever it s confirmed.

Maybe have 105W for 16C Zen5 variants, and 170W for 24C Zen5 variants. And possibly 170W for 16C Zen5 + 16C Zen5C variants also. That is if we'll get such variants.

Would be more optimal w.r.t. efficiency like you said.

Methink that AM5 s 170W TDP/230W PPT was implemented with more cores in mind for future SKUs, it s really useless for 16C as demonstrated by benchmarks, they just pushed the 7950X for competitive reasons, but overall that ended being a discutable choice that only brought useless complications.

 

[Geddagod]

Methink that AM5 s 170W TDP/230W PPT was implemented with more cores in mind for future SKUs, it s really useless for 16C as demonstrated by benchmarks, they just pushed the 7950X for competitive reasons, but overall that ended being a discutable choice that only brought useless complications.

Or maybe it was implemented with Zen 5 in mind, knowing that each Zen 5 core is going to draw more power iso clock, and if the high end of the IPC estimates are true, could be an actually marginally higher percent of power draw.
I forget, do leaks say Zen 6 would be on AM5?

 

[Abwx]

Or maybe it was implemented with Zen 5 in mind, knowing that each Zen 5 core is going to draw more power iso clock, and if the high end of the IPC estimates are true, could be an actually marginally higher percent of power draw.
I forget, do leaks say Zen 6 would be on AM5?

For Z5 to draw more power at isofrequency it should also be at isoprocess, in wich case a 20% better throughput/Hz would indeed require at least 20% more power, but this will be countered by a more efficient process that is at least 20% more efficient at isofrequency.

So clearly a 230W max power can only suit a 24C or eventually a 32C at even smaller nodes.

 

[SiliconFly]

Is alchemist going to span 3 nodes? N6, N5, N3

(Deleted. Wrong thread)

 

[Geddagod]

Dunno. But saw this wccftech leak a while back (kindly ignore the cpu tile for a while). But the ARL GPU tile is 3nm. And one AT article even mentioned it might be on N3E. Again not sure.

• Intel Arrow Lake "Official" - 20A Compute Tile / TSMC 3nm GPU Tile / TSMC 3nm IO & SOC
• Intel Arrow Lake "Rumor" - Intel 3 Compute Tile / TSMC 3nm GPU Tile / TSMC 3nm IO & SOC

didnt realize this was an amd thread, ill reply to this in the intel thread mb

 

[SiliconFly]

didnt realize this was an amd thread, ill reply to this in the intel thread mb

Oops. My apologies. Will remove it asap.

 

[Geddagod]

For Z5 to draw more power at isofrequency it should also be at isoprocess, in wich case a 20% better throughput/Hz would indeed require at least 20% more power, but this will be countered by a more efficient process that is at least 20% more efficient at isofrequency.

So clearly a 230W max power can only suit a 24C or eventually a 32C at even smaller nodes.

If the IPC increase is ~20%, it won't be drawing at least 20% more power, it should be much less. Zen 3 was a 19% ipc increase, and it brought no increase in power/frequency vs zen 2. However, IIRC it didn't widen the core much at all, so even if Zen 5 fattens the core more, the slight node shrink should help.
It's why I specifically said that "if the IPC increase is on the high end of rumors" since those are like 30%. At that point, yes I expect a marginal increase in power/frequency.
N4 is not that good of a perf/watt increase at the power levels and frequencies Zen 5 is clocking at.
Lastly, I just want to add, the MT power scaling of the 7950x is really dependent on what application is being used. In CB for example, scaling appears to be pretty dead at the 150-175 watt range, but in Linpack it's decent until the 200-175 watt range (buildzoid 7950x power scaling vid). And also, both Intel and AMD are pushing power way past their peak efficiency range for better scores. Intel doesn't have mobo compatibility to worry about, so it's clearly for the benches. And most customers care way more about that, then the perf/watt of their CPUs (regular consumers, not like companies).

 

[Abwx]

If the IPC increase is ~20%, it won't be drawing at least 20% more power, it should be much less.

I said at isoprocess.

Zen 3 was a 19% ipc increase, and it brought no increase in power/frequency vs zen

Not sure about this, Zen 3 use more power at same frequency than Zen 2 but with 5% lower frequency you can reduce power much more than you lose perfs.

Lastly, I just want to add, the MT power scaling of the 7950x is really dependent on what application is being used. In CB for example, scaling appears to be pretty dead at the 150-175 watt range

Scaling has nothing to do with TDP unless the 16 first threads (for a 7950X) exhaust all the power budget, but that s not the case, in CB the SMT gain is about 30%, at a given frequency you ll have 30% more throughput than with 16T,instead you use those 30% power budget to boost the 16 first threads frequency instead the uplift would be miserable comparatively.