Why are Intel CPU's better than AMD's at the same clocks?

[techs]

I understood why the old Pentium 4 was such a poor performer due to its many pipeline stages.

What I don't get is what gives the Intel Core cpu's such an advantage over AMD's most current product line.

Is it the large cache built into most Intel cpu's?
Is the Intel just a better design?

 

[happysmiles]

Better design.

we all learnt many years ago that megahertz isn't everything

 

[Bman123]

The ipc is better on Intel chips, like way better

 

[Arachnotronic]

I recommend reading Hennessey and Patterson - the standard text on computer architecture. The complexity of a modern CPU is mind-boggling, and performance characteristics cannot be explained by 1 or 2 concepts.

 

[Olikan]

you can read here, for a hardcore review
or here, for a softcore review

 

[Barfo]

Intel CPUs are American and AMD are made by commies.

 

[Idontcare]

Why are Intel CPU's better than AMD's at the same clocks?

I can answer that with one picture:

Intel spent more, AMD spent less. They each got what they paid for.

 

[Ajay]

I recommend reading Hennessey and Patterson - the standard text on computer architecture. The complexity of a modern CPU is mind-boggling, and performance characteristics cannot be explained by 1 or 2 concepts.

LOL!! Just a little bit of lite reading - how many pages in the latest edition? 800?

 

[Cerb]

I understood why the old Pentium 4 was such a poor performer due to its many pipeline stages.

That's basically the problem. Too-long pipelines, too-long cache latencies, and too-long recovery penalties (full-OOO cores have to worry about that) make it too fragile. Now, even if that weren't the case, it would be slower, than Intel's, being a RISC-like 2/2 core, but not nearly as much as it is.

 

[tweakboy]

A CPU's Mhz has nothing to do with most of the speed. Its not only about Mhz cuz if you figure for years Mhz hasnt improved but speed has improved 100 percent over C2Q

You dont need fast Mhz to fast machine,, AMD can have less mhz but make a faster CHIP which they wont compared to what Intel will come out with...

 

[blastingcap]

I can answer that with one picture:

Intel spent more, AMD spent less. They each got what they paid for.

Interesting hypothesis. Care to share your interpretation of NetBurst vs Athlon64? 😀

Spending more doesn't always mean outperforming the competition.

But it helps. 🙂

Apparently Bulldozer was doomed from the get-go with severe architectural problems that won't get solved until Steamroller, which I've heard will get 30% faster IPC, in other words, faster than Thuban (finally).

 

[AtenRa]

Apparently Bulldozer was doomed from the get-go with severe architectural problems that won't get solved until Steamroller, which I've heard will get 30% faster IPC, in other words, faster than Thuban (finally).

where did you see the 30% IPC gain ???

 

[blastingcap]

where did you see the 30% IPC gain ???

http://www.xbitlabs.com/news/cpu/di...Steamroller_Third_Gen_Bulldozer_Incoming.html

"One of the reasons why dual-core Bulldozer modules [the same may be said about Piledriver] are not completely efficient is because they have only one instruction decoder for two ALUs and one FPU. With steamroller, AMD not only incorporated two decoders per module, but also increased instruction cache size (to lower i-cache misses by 30%), enhanced instruction pre-fetch (the number of mis-predicted branches is down by 20% compared to Bulldozer ) as well as improved max-width dispatches per thread by 25%. AMD believes that Steamroller will provide 30% improvement in ops per cycle."

 

[Olikan]

That's basically the problem. Too-long pipelines, too-long cache latencies, and too-long recovery penalties (full-OOO cores have to worry about that) make it too fragile. Now, even if that weren't the case, it would be slower, than Intel's, being a RISC-like 2/2 core, but not nearly as much as it is.

bulldozer pipeline is not that long...
bulldozer problem is:
1- decoder
2- cache
3- FPU
4- "money" as IDC pointed out

decoder is going to be fixed in steamroller, but then, the cache and FPU are going to hit the overall performance even more...

then there is money... intel spend alot of R&D, and this money is used to improve small details, that add up, and make it a better cpu...
a good example is the memory controler...
AMD did a good job at integrating it on-die,
but, right now intel have a way better IMC...

 

[SPBHM]

also, AMD relying on Global Foundries (which was part of AMD in the past) seems to be a huge disadvantage...

 

[AtenRa]

http://www.xbitlabs.com/news/cpu/di...Steamroller_Third_Gen_Bulldozer_Incoming.html

"One of the reasons why dual-core Bulldozer modules [the same may be said about Piledriver] are not completely efficient is because they have only one instruction decoder for two ALUs and one FPU. With steamroller, AMD not only incorporated two decoders per module, but also increased instruction cache size (to lower i-cache misses by 30%), enhanced instruction pre-fetch (the number of mis-predicted branches is down by 20% compared to Bulldozer ) as well as improved max-width dispatches per thread by 25%. AMD believes that Steamroller will provide 30% improvement in ops per cycle."

I believe this is about Macro-OPs and has nothing to do with 30% IPC gains.

 

[NXIL]

Interesting hypothesis. Care to share your interpretation of NetBurst vs Athlon64? 😀

Spending more doesn't always mean outperforming the competition.

But it helps. 🙂

Intel spends more on R&D each year than AMD's total annual revenues.

AMD 2011 Revenue: $6.57 billion

Intel R&D spending: $8.4 billion

That buys 22nm fabs, that 3d process thing they do with the tri gate thing on the 22nm chips....and they are getting ready to fire up 14nm.

Source for R and D budgets: hmmm, I am surprised Microsoft is still at the top....

http://usatoday30.usatoday.com/mone...-research-and-development-spending/53673126/1

 

[Cerb]

bulldozer pipeline is not that long...

Some are. But then caches are far, L1D too small, and mispredict penalties too much, even when CPI-limited code isn't hurt by pipelines. They chased speed, despite that power efficiency was a huge part what made their last CPU series(es) so successful.

 

[Barfo]

Intel spends more on R&D each year than AMD's total annual revenues.

AMD 2011 Revenue: $6.57 billion

Intel R&D spending: $8.4 billion

That buys 22nm fabs, that 3d process thing they do with the tri gate thing on the 22nm chips....and they are getting ready to fire up 14nm.

Source for R and D budgets: hmmm, I am surprised Microsoft is still at the top....

http://usatoday30.usatoday.com/mone...-research-and-development-spending/53673126/1

What's that to do with the Netburst fiasco?

 

[Ajay]

http://www.xbitlabs.com/news/cpu/di...Steamroller_Third_Gen_Bulldozer_Incoming.html

"One of the reasons why dual-core Bulldozer modules [the same may be said about Piledriver] are not completely efficient is because they have only one instruction decoder for two ALUs and one FPU. With steamroller, AMD not only incorporated two decoders per module, but also increased instruction cache size (to lower i-cache misses by 30%), enhanced instruction pre-fetch (the number of mis-predicted branches is down by 20% compared to Bulldozer ) as well as improved max-width dispatches per thread by 25%. AMD believes that Steamroller will provide 30% improvement in ops per cycle."

And the first chart says "maintain a high frequency engine". So I wonder if GF's 28 nm SHP is looking good, or if that's just marking blather. Originally I heard that 28 nm would be @ lower frequencies, but if GF/AMD can stay somewhere around 4 GHz, then SR would actually be a fairly impressive part. For the sake of competition, I hope that is true.

 

[Revolution 11]

Ironically, many features that first came out in Netburst were later used in Nehelem and Sandy Bridge architectures.

 

[Cerb]

Ironically, many features that first came out in Netburst were later used in Nehelem and Sandy Bridge architectures.

Just like BD, most the features weren't bad ideas--it was poor implementation, and in the case of Willamette, trying to implement some features before the xtor density was high enough.

 

[Makaveli]

What's that to do with the Netburst fiasco?

Its simple this hasn't really changed much even back then.

Intel has always been the 800lb gorilla in the room.

Alot of people think that when Athlon 64 was killing the P4 that intel was in some kind of bad position. And they were but it was always short term, they can afford design a crap cpu and still sell it. AMD cannot survive multiple quarters of failure.

So while AMD won the battle in that time frame they were always losing the war.

It always comes back to money! And intel will always have more of it then AMD.

I give AMD credit for punching a sleeping giant in the arm and getting them to wake up, but the facts still remain the same!

 

[SlowSpyder]

What's that to do with the Netburst fiasco?

Intel spent unwisely. 🙂

Ironically, many features that first came out in Netburst were later used in Nehelem and Sandy Bridge architectures.

Actually, I think Netburst was sort of a tangent. Sandy and Ivy can trace their roots back to the Pentium M/Pentium 3 which was really based on the Pentium Pro. I think. 🙂 I'm sure some of the Netburst tech was recycled, but I believe the bulk of the tech is ultimately based on the Pentium M/2/3.

 

[techs]

Intel spends more on R&D each year than AMD's total annual revenues.

AMD 2011 Revenue: $6.57 billion

Intel R&D spending: $8.4 billion

That buys 22nm fabs, that 3d process thing they do with the tri gate thing on the 22nm chips....and they are getting ready to fire up 14nm.

Source for R and D budgets: hmmm, I am surprised Microsoft is still at the top....

http://usatoday30.usatoday.com/mone...-research-and-development-spending/53673126/1

Wow. Thats just unexpected.