What will AMD do between now and bulldozer?

[Idontcare]

Originally posted by: Eeqmcsq

Originally posted by: Idontcare
AMD to axe jobs in Q1

That's around the time AMD is supposed to restore reduced salaries also. It's going to be a tough 2010 and 1st half of 2011. It'll be Bulldozer or bust for them.

What adds to the sad story is that Hector Ruiz, the guy most people blame for AMD's downfall, is linked to the recent insider trading story. Ex-Chief of AMD Is Linked to Galleon

I am soooooo trying to be surprised...this guy has been quality every where he has been in life.

 

[IntelUser2000]

Originally posted by: Idontcare
Excellent question, the answer has something to do with what is called "interprocessor communications" in the area of computer science that deals with performance scaling with cores/threads.

The sole reason for all blocks regarding interprocessor communication taking massive amounts of die in the Nehalem-EX.

 

[cbn]

The only comments we have regarding the 32nm deneb shrink are from that most recent conference call in which they (Dirk? I can't remember exactly who it was on the AMD side that made the comment) said it would their first monolithic Fusion chip.

So when it comes to socket questions the question we are really asking is will Fusion-type products have access to all the necessary I/O if they are shoe-horned into an AM3 socket? Or will Fusion require a new socket to enable the GPU stuff to get off the chip as well?

We also don't know if AMD will recycle the 32nm deneb shrink core logic area and create a non-IGP non-fusion dedicated CPU. We can fathom them doing this considering what they have done with Athlon II X2 masksets on 45nm but they have not given any roadmap indications that this will come to pass on 32nm.

All we have is confirmation that 32nm deneb shrink with integrated graphics (fusion) is coming Q4 2010 and BD won't be out until 2H 2011.

Even if the first 32nm Phenom II ends up being Fusion...could it still be plausible to use it with the IGP disconnected on a AM3 board?

Other than that my biggest concern would be the L3 cache size. If IGP is also under the heatspreader we may not see an increase in that area.

 

[ilkhan]

Llano is a quad core with GPU 32nm Phenom II (K10.5 or whatever) chip. It's their stepping stone to BD.

 

[cbn]

Llano is a quad core with GPU 32nm Phenom II (K10.5 or whatever) chip. It's their stepping stone to BD.

http://www.xbitlabs.com/news/cpu/di...no_Die_4_x86_Cores_480_Stream_Processors.html

I doesn't sound like it has L3 cache according to this.

The GPU might be pretty good though. 480 stream processors sounds pretty strong.

 

[waffleironhead]

http://www.xbitlabs.com/news/cpu/di...no_Die_4_x86_Cores_480_Stream_Processors.html

I doesn't sound like it has L3 cache according to this.

The GPU might be pretty good though. 480 stream processors sounds pretty strong.

They are guessing, just like everyone else at this point. Are you assuming that AMD will need to drop the L3 cache to fit the GPU onboard given the 32 die size?

 

[IntelUser2000]

They are guessing, just like everyone else at this point. Are you assuming that AMD will need to drop the L3 cache to fit the GPU onboard given the 32 die size?

That's not the whole die pic anyway. Here's the full shot:

http://forums.anandtech.com/showthread.php?t=2023245&highlight=llano

It might not need the L3 for GPU functions. GPUs need bandwidth, not low latency.

 

[OCGuy]

They will beg the EU for some of that settlement money.

 

[jvroig]

They will beg the EU for some of that settlement money.

They skipped the middleman and went directly to Intel to get the money.