[VC]NVIDIA GeForce GTX 980, GTX 980 SLI, GTX 970, 3DMark performance

[Enigmoid]

There is a lot of "secret sauce" about Maxwell which Anandtech wrote about in the GTX 750 Ti review that Nvidia havent shared yet.

The fact that a GTX 750 Ti with 86.4GB/s bandwidth does just as good in 900p as it does in 1600p against GTX 650 Ti Boost with 144.2GB/s bandwidth, means there are some really good optimizations done on the bandwidth part.

http://www.techpowerup.com/reviews/NVIDIA/GeForce_GTX_750_Ti/25.html

So I wouldnt worry too much about that the GM204 is only 256bit.

I agree. This can easily be seen in mobile GM107 where a 850m at the same clockspeed with DDR3 gets 75-85% of the performance of the GDDR5 model.

Comparing the 750Ti and the 780Ti on bench, the 780TI is just under 3x as fast. GM204 will have about 2.6x the bandwidth of the 750Ti so it should be able to match.

Comparing to the 770, the 750Ti is just over 50% the speed despite having only 39% the bandwidth.

 

[Silverforce11]

If it is close to Hawaii in die size, I guess all the people complaining that it is a mid-range product should also be complaining that Hawaii is mid-range?

It's the largest single GPU that AMD makes for this generation so no, its not mid-range in that sense. AMD prefers to have higher density to keep their die sizes smaller as well.

But certainly in the scheme of things, Gk104 was mid-range, because we saw the GK110 after it, and likewise, GM104 is mid-range because undoubtedly there is GM100/GM110 coming soon.

Still, >400mm2 is pretty big for NV's mid-range, but its definitely due to being stuck on 28nm.

 

[digitaldurandal]

There is no reason to get up in arms about the bus size.

The end result is that this discussion will have no impact on the real world performance. While we can speculate back and forth about whether or not it is going to be a viable card for higher resolutions - I think it is silly to get heated about it.

The card is coming out soon and we will see the reality of the situation. If it is good for high resolutions then the engineers have prevailed. If you still feel like you are being cheated of possible performance for some reason, simply do not buy the card. More information will come for you to base a decision on, there is no need to bash each other back and forth.

 

[tviceman]

There is no reason to get up in arms about the bus size.

The end result is that this discussion will have no impact on the real world performance. While we can speculate back and forth about whether or not it is going to be a viable card for higher resolutions - I think it is silly to get heated about it.

The card is coming out soon and we will see the reality of the situation. If it is good for high resolutions then the engineers have prevailed. If you still feel like you are being cheated of possible performance for some reason, simply do not buy the card. More information will come for you to base a decision on, there is no need to bash each other back and forth.

Best post of this thread.

 

[tviceman]

It's the largest single GPU that AMD makes for this generation so no, its not mid-range in that sense. AMD prefers to have higher density to keep their die sizes smaller as well.

And yet higher density dies are more prone to defects per mm^2, so the costs to keep the die sizes down are a wash.

 

[3DVagabond]

There is no reason to get up in arms about the bus size.

The end result is that this discussion will have no impact on the real world performance. While we can speculate back and forth about whether or not it is going to be a viable card for higher resolutions - I think it is silly to get heated about it.

The card is coming out soon and we will see the reality of the situation. If it is good for high resolutions then the engineers have prevailed. If you still feel like you are being cheated of possible performance for some reason, simply do not buy the card. More information will come for you to base a decision on, there is no need to bash each other back and forth.

This is a discussion. I don't see anyone getting heated. People who don't think it's a good value say their piece just like the ones who think it's awesome because of it's efficiency increase. This has nothing to do with who's going to buy one or not.

 

[Silverforce11]

And yet higher density dies are more prone to defects per mm^2, so the costs to keep the die sizes down are a wash.

I didn't get to see the internal AMD reports on yields so I cannot comment on your statement.

But 28nm is pretty well matured by now, we can all agree on that.

 

[Deders]

Apparently the graphs from VideoCardz.com are "synthesized" or "made up (based on specs they imagine it would have)"

http://www.tomshardware.com/news/gtx-980-videocardz.com-nvidia,27621.html#xtor=RSS-998

 

[antihelten]

Apparently the graphs from VideoCardz.com are "synthesized" or "made up (based on specs they imagine it would have)"

http://www.tomshardware.com/news/gtx-980-videocardz.com-nvidia,27621.html#xtor=RSS-998

I think that's just THG misinterpreting this sentence in the videocardz article: "some scores were calculated from an average of many entries", unless they know something more of course

 

[wand3r3r]

At this point everything should be taken with a teaspoon of salt. Things do tend to leak the closer to launch we get, sorting through the true leaks is a bit harder.

 

[tviceman]

I didn't get to see the internal AMD reports on yields so I cannot comment on your statement.

It's partially dictated by the type of transistors used, but beyond that its simple logic. The more dense the chip, the prone to defects it will be.

 

[f1sherman]

It's not logic, it's not even all-mighty physics. It's a simple geometry

 

[Kenmitch]

At this point everything should be taken with a teaspoon of salt. Things do tend to leak the closer to launch we get, sorting through the true leaks is a bit harder.

Maybe even a tablespoon of salt.

I don't see the point of arguing about the hypothetical performance or lack of game changing ability without even seeing any official specs, benchmarks, or users hands on experiences.

More power to those who want to hype, de-hype, praise, or even condemn based on the internet hyperbole effect.

 

[Silverforce11]

It's partially dictated by the type of transistors used, but beyond that its simple logic. The more dense the chip, the prone to defects it will be.

I was referring to your 2nd statement, that your claimed higher errors would make a smaller die less effective in terms of cost savings. I didn't get their memo on that. Maybe you did, ok.

 

[realibrad]

It's partially dictated by the type of transistors used, but beyond that its simple logic. The more dense the chip, the prone to defects it will be.

The question that has to be answered is the likelihood of a defect and its costs greater than then going larger? I don't think you have the data to show either way.

 

[wand3r3r]

And yet higher density dies are more prone to defects per mm^2, so the costs to keep the die sizes down are a wash.

Good luck trying to prove this one.

 

[Cloudfire777]

The scores of all GTX 900 was found on 3DMark.com.
Its not made up, they are real.

GTX 980M and GTX 980M SLI had perfect scaling.
GTX 980 and GTX 980 SLI only got +50% scaling. But the CPU they used was i7 950, and it most likely had CPU bottleneck.

 

[Subyman]

Maybe I missed it, but is there a timeline or ETA for these cards? Are we talking months or weeks?

 

[Mand]

The question that has to be answered is the likelihood of a defect and its costs greater than then going larger? I don't think you have the data to show either way.

The likelihood of a defect forming is uniform across the wafer. With larger dies, you have a greater percentage of the dies containing a defect. The simple example is there's one defect: with 100 dies per wafer, you have a 1% failure rate. With 10 dies per wafer, you have a 10% failure rate.

 

[Mand]

Maybe I missed it, but is there a timeline or ETA for these cards? Are we talking months or weeks?

Most likely weeks. Nvidia is gearing up a major press event for next Thursday Sep 18, which is likely to be the official announcement. Who knows when availability will be after that, but it shouldn't be all that far off.

 

[tviceman]

Good luck trying to prove this one.

I won't even bother. Not sure that I can anyways. It's just a matter of common sense and physics. If there is a 100mm^2 die that has 1 billion transistors, and another 100mm^2 die that has 500 million transistors, both dies use the same ratio of transistor types, the die with more transistors per mm^2 is going to be prone to more defects.

 

[Skurge]

I won't even bother. Not sure that I can anyways. It's just a matter of common sense and physics. If there is a 100mm^2 die that has 1 billion transistors, and another 100mm^2 die that has 500 million transistors, both dies use the same ratio of transistor types, the die with more transistors per mm^2 is going to be prone to more defects.

I'm no expert, but I don't think thats how it works. I'm pretty sure if they are the same size they will have the same percentage of defects across a wafer.

 

[Vesku]

I won't even bother. Not sure that I can anyways. It's just a matter of common sense and physics. If there is a 100mm^2 die that has 1 billion transistors, and another 100mm^2 die that has 500 million transistors, both dies use the same ratio of transistor types, the die with more transistors per mm^2 is going to be prone to more defects.

However, without wafer costs and average % defective chips per wafer at the different densities it's not possible to determine when it becomes "a wash".

So is Nvidia's GM207 die denser than the Kepler dies? If so 28nm Maxwell will be remarkably comparable to AMD's Hawaii.

 

[Kenmitch]

I'm no expert, but I don't think thats how it works. I'm pretty sure if they are the same size they will have the same percentage of defects across a wafer.

True....But wouldn't the higher density play a part in a critical vs tolerable defect?

 

[tviceman]

I'm no expert, but I don't think thats how it works. I'm pretty sure if they are the same size they will have the same percentage of defects across a wafer.

I'm no expert either, but I disagree. Perhaps IDC can chime in on this and set this (or me) straight.