TSVs to Split More Chips: Re-Integration is the Focus
Die stacking is happening and AMD is doing it, said Bryan Black, senior fellow at AMD as he reviewed todays 2.5D and 3D packaging solutions, but why is it happening now? questioned Black, claiming that AMD had figured out yield issues about ten years ago and is about to use TSVs across all of its product portfolio.
Cost is the first reason, especially when making large dies at advanced nodes becomes cost prohibitive because of decreasing yields. Silicon integration is running out of gas, Black says, arguing that the next process node may not necessarily come out cheaper overall.
His analysis is that even though Moores law will give us more transistors at each new node, they will not be the right transistors, because process scaling will stop supporting diverse functionalities on a single die such as fast logic, low power logic, analog, and cache.
Hence, logically, engineers will want to break large single dies into specialized components to maximize the value of new and existing process nodes, only to be re-integrated through 2.5D and 3D stacks. In his view, IC integration will never move away from interposers, but on the contrary, silicon interposers will be the SoCs sockets of the future, hosting multi-sourced 3D components whose functionalities can scale at their own pace.
Source:
http://www.eetimes.com/document.asp?doc_id=1325440&