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Speedstep yay or nay?

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I'm pretty sure you don't have a clue what you are saying, don't listen to this OP it is utter rubbish. The only time you should turn it off is if you are going for insane OCs on LN2.


Your wrong [redacted]I know exactly what IM saying,, your the clown.[redacted]

This is a disspointing post on multiple levels. The fact that you would so brazenly attack another member leaves me no choice but to put you on a long vacation. We will NOT tolerate posts like these
-ViRGE
 
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While I made a misake and thought the OP was talking about a SB chip, abusive language like that is completly out of line.
 
Example.. (not working) ur running a multi of 10 with a bclk of 200 vs stock 100. In short that gives u 2ghz instead of 1ghz. When speedstep kicks in it drops just the multi to 8, and still leaves the bclk at 200mhz... which then u go down to 1.6ghz. instead of the factory set 800mhz. The voltage is dropped to lower then stock values, and if u dont have a nice chip, it will BSOD at 1.6ghz with the voltage speedstep defines, because that idle voltage was locked for 800mhz... and ur trying to run 1600mhz.

Clarify this for me, are you saying that a CPU defines its volatge requirement from the multi and not the actual speed (i.e multi x bclck) at a given point?
 
Ever since Core 2 EIST hasn't affected in any way the max stable overclock you'll be able to get from a CPU
Once mobo mfgs figured it out, that is.

On a "good" (EIST doesn't affect overclock) mobo, they design it so that when you change the vcore, it applies regardless of speedstep, such that when you drop speeds, it doesn't drop your voltage down to something unstable.
 
But for the most part it is not running at 4GHz if you have C3/C6 enabled. You may find that for more than 90% of the time the clocks are stopped and the cores / package are in a low power state. It only runs 4GHz in short bursts.

DLeRium, you can get an idea of how ineffective EIST is here. The savings for using EIST with C3/C6 vs just C3/C6 are in the order of less than 2W. With EIST disabled the full power of the CPU can be had much quicker. IIRC with W7 default balanced power plan EIST will take some 30ms before transitioning from the lowest performance state to the next highest state. For some people that may mean seeing stutter effects but of course YMMV and in the end it's up to you. IMHO though EIST on todays CPU's is much overrated when it comes to power saving and offers next to no benefit when using the power saving features of higher c-states.
EIST saved me ~30 watts when just sitting here in idle. ADding dynamic vcore only saved me another 5 watts or so. I was surprised because I thought Power is related to ~CFV^2 so reducing voltage should have far more of an effect. I suppose the cpu is idle anyway with EIST, so the reduced voltage doesn't do that much.
 
Your wrong [redacted] I know exactly what IM saying,, your the clown. [redacted]

Whats your problem? Youve been a dick to anyone that youve quoted for days now, and thats just since ive started looking at your posts. Im sure you were as rude before i stared viewing too.

Also, speedstep and C1e shoul;d be on reguardless. They only affect your computer when its idle, who needs 5ghz while sitting at the desktop?
 
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Whats your problem? Youve been a dick to anyone that youve quoted for days now, and thats just since ive started looking at your posts. Im sure you were as rude before i stared viewing too.

Also, speedstep and C1e shoul;d be on reguardless. They only affect your computer when its idle, who needs 5ghz while sitting at the desktop?

I tend to agree although a couple of people have pointed out that there are certain situations where leaving them on can cause instability so the answer seems to be leave them on unless they cause system crashes.
 
I tend to agree although a couple of people have pointed out that there are certain situations where leaving them on can cause instability so the answer seems to be leave them on unless they cause system crashes.
it depends computer to computer and motherboard too but I read some people with Asus boards would BSOD at idle a lot, but some BIOS updates have remedied their problem in which the offset also affects the idle voltage and not just the peak voltage.

However it's questionable whether its a linear trend?

For example:
Stock idle: 1V (stable for stock idle frequency)
Stock load: 1.2V

If you apply an offset of +0.1V because you know you need 1.3V to hit 4ghz for example, is 1.1V (1.0 + 0.1V) enough for your idle frequency (whatever that is?).
 
Yes, it is completely wrong. All that turning off EIST will do is raise your idle power consumption immensely. Ever since Core 2 EIST hasn't affected in any way the max stable overclock you'll be able to get from a CPU, and if your CPU is stable at 4GHz with EIST turned off then it'll be stable at 4GHz with it turned on.

Turn it on.

I throw my vote in support of this post
 
I was surprised because I thought Power is related to ~CFV^2 so reducing voltage should have far more of an effect.

Power is related to fV² but if you use c-state C1 or higher the core clock is stopped so f=0 😉 There are still other cores and parts of the processor that may use power but the higher the c-state used the more things will be turned off.

Here is an example run on SNB of using EIST with all c-states higher than C0 disabled so in effect we are just using C0 with EIST enabled.
dphhe.png

Note in this case that EIST will not even down clock without the help of the higher c-states to provide some idle time even though you can see taskmanger is showing that there is very little running with scheduling usage near 0%.


Still we can force the multi to what we want, something that is usually much easier to do when EIST is disabled so we do not need to fight with the system. Here's the same settings but forcing 16x multi.
buchz.png

Now maybe you can better see the fV² correlation because none of the cores are having their clocks halted by the higher c-states.


And here we have disabled EIST and C1E in the BIOS and just have C3/C6 enabled. C1 is left enabled in the OS.
rvno4.png


Note that cpu-z shows 16x multi. While a small amount of time may be spent at the LFM (16x multi) when transitioning to and from C3/C6, cpuz tends to do this if there is low load so showdutycycles (F9) has been selected instead.

FWIW usually I run SNB with 0.25V addtional turbo voltage, -0.005 offset voltage, regular LLC (0%), C3/C6 enabled, C1E/EIST disabled, stepped turbo 4.6GHz - 5.0GHz.


Here is an example of the default EIST step in W7 balanced mode, the multiplier readings are averaged but you can see on the graph where it starts at the LFM (16x) then later transitions to turbo.
ijjcl.png


Without EIST.
bdsk1.png



Ever since Core 2 EIST hasn't affected in any way the max stable overclock you'll be able to get from a CPU
Well this is going a little OT but the mobile Core 2 were a little different, at least those that supported IDA (Intel Dynamic Acceleration) the predecessor to turbo boost.

The cpu could boost one of the core frequencies (called the opportunistic frequency) when the other core was inactive however it was possible to run both cores at the opportunistic frequency if EIST was disabled. IIRC the mobile quads were just 2 dual cores interfaced together so same principal applied.

I have run my laptop this way for nearly 3 years now with EIST disabled and cpu with 30% OC. When just browsing or not using high workloads the battery seemed to last just as long as it did with EIST enabled.
 
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