• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

Page 530 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

Vattila

Senior member
Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

Untitled2.png


What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts! 🙂
 
Last edited:
Hmm, it seems AMD actually made its first 4-socket HPC server for MS with only CPUs and monstrous memory bandwidth available. 88x Zen 4 cores clocked at 4Ghz. Four of these have access to 450GB of HBM at ~7.0Tbps bandwidth. Nodes connected via InfiniBand.




I guess under the hood it's just a MI300 derivate with only CPU cores? (Sort of like MI300A but no GPU cores, binned to 88 cores, down from 96)
 
It's possible that they are just choosing to disable them to increase yields. Hawk Point will broadly compete with Kraken on most metrics, but they need Kraken to have higher ASPs. The NPU will be the differentiator.

If they were really smart, they'd have done a Hawk Point part that, instead of having an NPU, had a 16MB LLC or just an infinity cache for the iGPU. That would have done well for them in handhelds in addition to the lower end of the laptop market.
 
It's possible that they are just choosing to disable them to increase yields. Hawk Point will broadly compete with Kraken on most metrics, but they need Kraken to have higher ASPs. The NPU will be the differentiator.

If they were really smart, they'd have done a Hawk Point part that, instead of having an NPU, had a 16MB LLC or just an infinity cache for the iGPU. That would have done well for them in handhelds in addition to the lower end of the laptop market.

The purpose of the NPU is so that OEMs can claim they are selling more "AI PCs".
 
It's possible that they are just choosing to disable them to increase yields. Hawk Point will broadly compete with Kraken on most metrics, but they need Kraken to have higher ASPs. The NPU will be the differentiator.

If they were really smart, they'd have done a Hawk Point part that, instead of having an NPU, had a 16MB LLC or just an infinity cache for the iGPU. That would have done well for them in handhelds in addition to the lower end of the laptop market.

It would need a new die and new verification to add LLC, so more trouble than the benefit AMD will get out of these in terms of revenue.
 
The purpose of the NPU is so that OEMs can claim they are selling more "AI PCs".
If AI PC is synonymous with Copilot+ PC, then Hawk Point's NPU doesn't cut it. Maybe they indeed fuse off the NPU in Ryzen 200s like they already did in some Ryzen 8000U, or maybe they leave it alone but just don't put "AI" in the name…?
 
It would need a new die and new verification to add LLC, so more trouble than the benefit AMD will get out of these in terms of revenue.
Oh, I know it was wishful thinking. They would have had to have made that decision years ago and validated it in parallel with the NPU version.
 
I doubt that it even made it to a test fab. It probably existed in the modern day equivalent of a verilog simulator and got no farther. I don't doubt that there may exist a few test samples of Strix Point in it's original configuration however.
 
Yet only NPU TOPS matter for Microsoft's Copilot+ PC sticker, not GPU TOPS, from what I understood.

Because then plenty of existing PCs would qualify as AI PCs, diminishing the ability for Microsoft to push new PC sales (i.e. new Windows license sales)
 
I never liked how a 'copyright protected' OS that advertises itself as fast and secure can be taken out of use simply by claiming the next OS is faster and more secure. The only way more complex systems are faster is by freezing features to handicap its use.
 
Back
Top