An aspect that I think could speed up the timeline is that perhaps AMD had Zen 3+ already planned and started developing with it potentially targeting TSMC 5nm. So its less that they're migrating Zen 3 to 5nm but rather are accelerating Zen 3+ because of opportunity to get 5nm earlier. They likely already have some substantial development started, and TSMC might help them to accelerate things even quicker. And they already have some Zen 3 produced on 7nm, so in some ways it'd be like a die shrink which should simplify things a bit, further compressing the development timeline.
I think it might even be potentially beneficial for AMD that production be kinda drawn out. Meaning, They get enough chips to launch the highest end Ryzen at the start of the year. Then a month or two later they launch the next rung down. And then the next. That takes say 6-8 months. By then, the process will have matured and improved, so they could then, either through just binning over that time span and because of the chiplet approach so they were producing the same chiplet just the cheaper ones had to build up enough defective chiplets and/or the production cost drops, that they also happen to have higher quality chiplets that they could then sell as a refresh. And then, depending on various factors they could either be primed for Zen 4 production or let the refreshed stuff carry them through the year.
With regards to them going with Vega yet again on the next APU, I think there's likely benefits for APUs to having consistent hardware. And you're generally limited quite a bit by other things such that you're not losing that much compared to the newest architecture for integrated GPU. So, we see them roll with Vega for what 3 generations, then they switch to RDNA2. I've posited before that the APU markets might value compute capability of Vega enough such that it was the tipping point, and since it already offered or they could tweak it to offer "good enough" performance for the graphics part of an APU, while it gives the CPU side consistent hardware to utilize/improve to maximize the total APU performance. And perhaps RDNA2 is where the compute capability doesn't take a step back.
Speaking about not being constrained by fab partners, I was just thinking about how the Samsung partnership could be interesting in another way. So, AMD develops GPU IP and then Samsung builds off of it, but likely tune the chips for efficiency and optimize for mobile market (meaning GPU but not overbuilt since it'd be constrained by thermal and battery). But what if AMD takes the Samsung SoC and slap it on an APU with a Zen based CPU chiplet, where the GPU would be enough. It could open up different product stack and features with little risk to AMD, where if they don't find a market for those features then they're out nothing, they would still be able to use it just for the GPU. But even for GPU performance it could be meaningful, like stacked DRAM for instance, where the GPU portion is then getting the full bandwidth of the stacked memory, alleviating memory bandwidth issues within the APU. Of course it could offer hybrid systems where when mobile it could go into an ARM mode for maximizing battery life, and then plugged in or in other mode it'd run Zen. It would also bring in the AI processing hardware that AMD's stuff has been lacking (and Samsung would be developing that so it wouldn't take resources from AMD while making Samsung's hardware more ubiquitous). And it'd bring cellular capability (although I might be mistaken and Samsung hasn't integrated their cellular modem into their SoC?). It also could give AMD the ability to offer mobile console options (Switch comes to mind, but they could offer a similar product to Sony and Microsoft for an option where it'd likely be especially good for the transition to game streaming, and that could potentially be the avenue for the hybrid processing that Microsoft considering, only it'd be where you have your console at home do a lot of processing but say you could support more than 1 portable console locally).
My previous theory has always been N7P, but now with everything leaking around like no tomorrow I am not sure.
My thinking was that
- The whole narrative about IOD not scaling at all while not untrue does not paint the complete picture. Renoir is proof of this. And TSMC's numbers also indicate the density gains for PHYs, analog blocks etc to be around 20-30% which are far less than the 80% gain in SRAM density but tangible nonetheless(vs previous node). They could make the IOD on N7
- Using everything TSMC, including IOD, is probably better, in that logistics are going to be slightly better, everything is fabbed at TSMC.
- A smaller IOD would leave lots of wiggle room for core and cache design. This means HP cell libraries could be feasible, for desktop at least, since the CCDs can be a bit bigger.
- If Renoir is anything to go by, a density gain of 20% over Zen2 CCD is guaranteed. There was no real frequency regression.
- Will server CCDs be same as desktop CCDs. Or will there be two sets of HP(Lower density performance oriented) and HD (Higher density efficiency oriented) CCDs, or will the Zen3 CCDs be same at all.
If Zen2 HD libs can hit 4.4 GHz, the HP cells would definitely hit 4.8+ (TSMC's own estimates). Add to that increased die area available from a potential usage of TSMC IOD. There would be room for larger caches and wider cores.
Will the WSA get in the way of innovation. Will the Zen3 designs use anything from GF at all? Lisa mentioned yesterday that Rome will be very much in production next year as well, add to that, the Pro and embedded series, there is a good chance they could meet these WSA obligations without constraining Zen3 chiplet designs by sticking with GF.
Of course Mobile is a different game, and it would make sense to move to N5(P)
I don't think AMD is concerned about the WSA much at all, as they have plenty of leverage. Plus couldn't they produce say chipset and other products at GF? I think there might be other potential there as well (interposers or similar?). Could also work deals for partners (like say someone has an FPGA or something). And I think there could be a wealth of potential embedded options. Zen based tinker boards. Maybe combine some Zen cores with an FPGA. With GF's 12nm that's good for wireless stuff, its possible that AMD could license some wireless IP and produce some of their own stuff, so that they could sell full stack solutions like Intel does. I might be mistaken but I think 12nm is the process that HBM3 is targeted for.
And some of it they could start at GF, and then move production somewhere else (Samsung, for instance, where Samsung could probably give them an idea of the benefit they'd see from going from the GF - which was based on Samsung's - 14/12nm to newer processes).
I'm not saying any of that stuff is likely, but there's definitely options for them to utilize GF.