Request for clarification: is TSMC 5nm going to be more akin to TSMC 7nm+ or 6nm?
TSMC 5nm is 14 layers of EUV and isn't cell-compatible with 7nm. ~59+ mask layers
TSMC 6nm is 5 layers of EUV and is cell-compatible with 7nm. ~65+ mask layers ((TSMC 6nm can re-tapeout 7nm(N7/N7P(also, N7
plus)) on EUV, while TSMC 7nm+ can't.))
TSMC 7nm+ is 4 layers of EUV and isn't cell-compatible with 7nm. ~65+ mask layers
TSMC 7nm, no EUV. ~75+ mask layers. (7LP/13ML on GloFo, it is 88 mask layers)
TSMC 7nm/6nm is ~40nm metal pitch and TSMC 5nm is ~28nm metal pitch. It also has a lower TCO cost w/o a shrink than 7nm. Making its shrink very cost-effective.
77 mm2 on 7nm => expensive
77 mm2 on 5nm(no shrink, no advancement, just a new process) => 15% lower cost
Relative to the other nodes, N5 is planned to be the longest. N5/2020-HVM -> N5P/2021-HVM -> N5P+(Ge+)/2022-HVM -> N5P+ Low Vdd(Ge+&LV)/2023-HVM.