Speculation: Ryzen 3000 series

[Markfw]

I thought they were launching on July 7th (7/7) to tie in with the whole angle of being the first 7nm CPU. July 7th is a Sunday so perhaps that means no real availability at most places until the 8th, but I don't recall hearing the 10th for availability.

I remember that also. Anyway, it will be around then.

 

[Topweasel]

Would it be pretty bad for (laptop) power consumption to have a chiplet BGA socket directly linked to a chipset/northbridge+iGPU?

In the old days (i386-5x86 days) I think there were off-CPU northbridges, as well as onboard GPU's.

The idea was getting at is that IF requires more power than a ring bus and a decently significant part of the CPU package power usuage. When dealing with IF over substrate TR and EPYC shows that, that power usage dramatically increases. So the more IF complexity that you the more of your power budget is going to non-clock or processing module (whether CPU or GPU) work. Zen has and maybe Navi does processing units can have great efficiency. It's why Zen has been so great at so many levels accept the high end performance till this point (assuming benchmarks concur). But power wise Monolithic designs will have an advantage on power usage over chiplet designs. Zen 2 is a great compromise on power vs performance for what it is on most levels and will still be if AMD decides to do a low voltage desktop Mataisse. But the power margin on laptop and other mobile devices I think the substrate IF power usage might be the straw that breaks the camels back when it comes to chiplet based APU's even ones where there isn't an intermediary IO chip where the IO is in the GPU portion (or CPU, but we know the CPU chiplets don't have it).

 

[Fanatical Meat]

I think it was June 10th when more info would be made available at E3, then pre-order on July 1, with availability maybe on July 7.

Could be pre-order 7/1, pick up or delivery arrives 7/7 (I know it’s sunday) general availability 7/10.
I have heard the 7/1 pre order date. Not sure where but I know I heard it.

 

[moinmoin]

The idea was getting at is that IF requires more power than a ring bus and a decently significant part of the CPU package power usuage. When dealing with IF over substrate TR and EPYC shows that, that power usage dramatically increases. So the more IF complexity that you the more of your power budget is going to non-clock or processing module (whether CPU or GPU) work. Zen has and maybe Navi does processing units can have great efficiency. It's why Zen has been so great at so many levels accept the high end performance till this point (assuming benchmarks concur). But power wise Monolithic designs will have an advantage on power usage over chiplet designs. Zen 2 is a great compromise on power vs performance for what it is on most levels and will still be if AMD decides to do a low voltage desktop Mataisse. But the power margin on laptop and other mobile devices I think the substrate IF power usage might be the straw that breaks the camels back when it comes to chiplet based APU's even ones where there isn't an intermediary IO chip where the IO is in the GPU portion (or CPU, but we know the CPU chiplets don't have it).

I feel the power usage of IF is overstated since many people (including one notorious article here on AT) mix up IF with the whole uncore. Case in point are the Threadripper WX chips (with 24 and 32 cores) compared to the equivalent Epyc chips. You'll notice the former have much lower power usage at idle. How could that be, after all the IF has to be the same between both? The answer is that Threadripper WX has only half the IMC and half the PCIe lanes activated, and those are eating a big part of the power usage at idle. And if one worries that the actual IF connections on MCM eat power, by centralizing them all into the IOC Zen 2 has less IF connections than Zen 1 had per die/chiplet.

 

[Topweasel]

I feel the power usage of IF is overstated since many people (including one notorious article here on AT) mix up IF with the whole uncore. Case in point are the Threadripper WX chips (with 24 and 32 cores) compared to the equivalent Epyc chips. You'll notice the former have much lower power usage at idle. How could that be, after all the IF has to be the same between both? The answer is that Threadripper WX has only half the IMC and half the PCIe lanes activated, and those are eating a big part of the power usage at idle. And if one worries that the actual IF connections on MCM eat power, by centralizing them all into the IOC Zen 2 has less IF connections than Zen 1 had per die/chiplet.

It's just an example and maybe TR2 shows an extreme case of that. It will be interesting to analyze the difference between the 3800x and the 3900x. I just don't see a problem assuming that IF pathway length leads to increase power usage (substrate or not) and that on an APU it would mean a larger portion of the power budget. The question becomes can AMD fit competitive products within the normal power budget (lets say 15w-35w) on their APU product ranges. If not is the trade off in design wins worth the flexibility of having chiplets. The real question is no matter how they pull it off, can they put the GPU dies to other uses. The value with Zen 2 is that they have and will have this gen and even greater product stack that will all be able to use these dies. If not then Mono makes sense anyways because the design costs will be similar they just lose some of the profits gained from reduced product costs due to volume of production and probably a decent decrease in yields. But they might have to do a APU Mono die at some level anyways for truly low power compact embedded scenario's.

 

[exquisitechar]

😵 WTH. BIG if true. This would explain the gaming gains.

https://imgur.com/j3dC0bV

Either fake or it isn't working properly with Zen 2.

 

[RaV666]

Either fake or it isn't working properly with Zen 2.

Why ?
Zen+ does 56ns on 4000MT/s
If you take the userbenchmark score of an 3600 with 2666MT/s ram and adjust it for memory freq gain it comes at 40ns.And that aida is on a x570 and oced chip.
I say plausible.Not that its certainly true, but plausible.
Like a month ago userbenchmark scores were 100ns on a 3200MT/s ram, now its 80ns at 2666.

 

[TDY2KN01]

I'm due for an upgrade. I'm going to hand me down the i7 6700k to my dad and get 3700x/3800X for
Photoshop, Lightroom and After Effect

Phantek Evolv X
32GB DDR 4 3000 mhz CL14
850W Platinum G2 EVGA
1TB NVME

All I'm waiting to see which one is best for OC.

 

[french toast]

Wow stuff is getting interesting.
X570... Amd can't win, punters screamed for advanced features, premium build, lot's of choices and lots of power available for OC, the gave it to them, now they complain!
Don't forget you can use the last gen boards.

 

[DarthKyrie]

Wow stuff is getting interesting.
X570... Amd can't win, punters screamed for advanced features, premium build, lot's of choices and lots of power available for OC, the gave it to them, now they complain!
Don't forget you can use the last gen boards.

It's AMD they're damned if they do and damned if they don't.

 

[Kenmitch]

Wow stuff is getting interesting.
X570... Amd can't win, punters screamed for advanced features, premium build, lot's of choices and lots of power available for OC, the gave it to them, now they complain!
Don't forget you can use tthe he last gen boards.

It's AMD they're damned if they do and damned if they don't.

It's silly while true. I guess the decade of disparity has it's lingering effects till this day. Maybe once the reviews are out and end users know the true potential of the offerings things will be different.

 

[Fanatical Meat]

It's AMD they're damned if they do and damned if they don't.

Plus as I said earlier if there is any remote way to f something up, AMD is bound to find a way.
Fan on the X570 May be it but who knows until
a) it’s released and tested
b) a few years go by to determine the failure rate.

Personally I don’t think the fan is a big deal but I would prefer to have a fanless option that doesn’t support nve raid or whatever the fan is needed for.

 

[Carfax83]

Why ?
Zen+ does 56ns on 4000MT/s
If you take the userbenchmark score of an 3600 with 2666MT/s ram and adjust it for memory freq gain it comes at 40ns.And that aida is on a x570 and oced chip.
I say plausible.Not that its certainly true, but plausible.
Like a month ago userbenchmark scores were 100ns on a 3200MT/s ram, now its 80ns at 2666.

I agree it's plausible. The primary reason for the bigger L3 cache was to reduce memory latency for gaming after all, according to Dr. Su.

 

[JDG1980]

Zen2 apparently supports JEDEC DDR4-3200 speeds. Does anyone know if this only applies to the X570 chipset or if this will be available on X470 boards as well? (And is there a release date for unbuffered ECC DDR4-3200 DIMMs?)

 

[Fanatical Meat]

Zen2 apparently supports JEDEC DDR4-3200 speeds. Does anyone know if this only applies to the X570 chipset or if this will be available on X470 boards as well? (And is there a release date for unbuffered ECC DDR4-3200 DIMMs?)

Unknown, I’ve been watching this however I’m not an expert.
3200 speed appear to be only for 2 dims per the Asus memory speed chart on the promo info regarding their X570 boards.
If I remember correctly they could be single or double sided.

 

[JDG1980]

Unknown, I’ve been watching this however I’m not an expert.
3200 speed appear to be only for 2 dims per the Asus memory speed chart on the promo info regarding their X570 boards.
If I remember correctly they could be single or double sided.

I'm only planning on using two DIMMs so that won't be a problem. 2x16GB should be more than enough.

 

[StinkyPinky]

Unknown, I’ve been watching this however I’m not an expert.
3200 speed appear to be only for 2 dims per the Asus memory speed chart on the promo info regarding their X570 boards.
If I remember correctly they could be single or double sided.

Two dimms officially. Am pretty confident the higher end boards will be able to do 3200 on all four unofficially with no problems.

 

[amrnuke]

😵 WTH. BIG if true. This would explain the gaming gains.

https://imgur.com/j3dC0bV

FWIW I heard the person who posted deleted it, and nothing further was stated. Unclear if it was real or not. Wow if true.

 

[amrnuke]

The B450-DS3H is 4+3, it should be fine.

Thank you - not sure why I thought 3+3.

 

[.vodka]

FWIW I heard the person who posted deleted it, and nothing further was stated. Unclear if it was real or not. Wow if true.

Most probably a fake.

https://www.reddit.com/r/Amd/comments/buwwbh/_/epix3ah

https://www.reddit.com/r/Amd/comments/buwwbh/_/epjc7tu

Between The Stilt himself shooting this down and all the sketchy/dubious parts in that afterthought of a picture of a screen (BIOS string is wrong/looks 'shopped among some others) and it displaying that "Overclock: xx%" string that I've never ever seen shown in AIDA's cachemem on Ryzen systems (someone points this out in the comments)...

It doesn't add up. Need better leaks or less sketchy ones.



If real, that memory latency is out of this world for such a design. If real, L2 and L3 bandwidth took a BIG hit. I don't think the L3 being that much slower justifies going to 32MB per CCD compared to what we had on Zen1. Memory performance more than makes up for it, then. It's not that much of an impressive kit either (DDR4-4000 CAS18 has ~9ns real latency, DDR4-3200 CAS14 is 8.75ns) so if real it isn't out of reach for many Zen2 owners.

If real, anyway, if this result as it is end up in the performance AMD has shown us (especially games) over Zen+, most of it has to be from that insane memory latency.

If real.

 

[tamz_msc]

New GB4 for Ryzen 5 3600 -
http://browser.geekbench.com/v4/cpu/13334011
This one has RAM running at 2666 MHz -
http://browser.geekbench.com/v4/cpu/13330826

According to Anandtech(https://www.anandtech.com/bench/CPU-2019/2203), ST score is right up there with Skylake.

 

[Gideon]

New GB4 for Ryzen 5 3600

Here is it compared to a 95W 2600X i helped to set up (with faster memory to boot):
https://browser.geekbench.com/v4/cpu/compare/10401111?baseline=13330826

The results are extremely promising, though to be fair, it turbos suspiciously well or is overclocked to 4.2, as the clocks are constantly @ 4.2, not flickering once, while the 2600X can only hold 4.0 GHz.

Here it is compared to a 8700 (non-k) with slightly faster memory. 8700 single core clocks should go up to 4.6, but multithreaded were listed at exactly the same clock (4.2 GHz):
https://browser.geekbench.com/v4/cpu/compare/13335169?baseline=13330826
The multithreaded scores are quite apples-to-apples vs 3600.

So when normalizing the results for clock speed, in the multithreaded test:
3600 is almost exactly 20% faster than the 2600X
(25% faster at 5% clock-speed advantage)

3600 is almost exactly 10% faster than the 8700 non-k
(10% faster at exactly the same clock-speed)

(can't really do it for ST as the clocks are not listed)

Quite impressive for a single generation leap.

 

[moonbogg]

The indications are that IPC is on par with or better than intel, but that means little to gamers if these chips are still affected negatively by latency which tends to diminish otherwise impressive CPU performance. Time will tell. I don’t see many comments about latency concerns. I find that interesting.

 

[itsmydamnation]

The indications are that IPC is on par with or better than intel, but that means little to gamers if these chips are still affected negatively by latency which tends to diminish otherwise impressive CPU performance. Time will tell. I don’t see many comments about latency concerns. I find that interesting.

well AMD had a like 34% perf improvement for CS:GO on there slides for 3800x vs 2700x so that should be a pretty good indication. a 2700x should be clocking around 4.2 so it only has like a 9% clock advantage.

https://images.anandtech.com/doci/14407/COMPUTEX_KEYNOTE_DRAFT_FOR_PREBRIEF.26.05.19-page-022.jpg

 

[Gideon]

well AMD had a like 34% perf improvement for CS:GO on there slides for 3800x vs 2700x so that should be a pretty good indication. a 2700x should be clocking around 4.2 so it only has like a 9% clock advantage.

https://images.anandtech.com/doci/14407/COMPUTEX_KEYNOTE_DRAFT_FOR_PREBRIEF.26.05.19-page-022.jpg

Yes, they have doubled the cache, which should also cut memory accesses significantly. Previously the L3 caches couldn't really share data between the two CCX. Geekbench seems to indicate (for a while now) that there are still 2 separate instances, but if they can snoop data from each other with low latency, we could be talking about up to 4x the effective L3 cache size.

Regardless, even 2x cache increase will diminish the need for memory accesses significantly