Speculation: Ryzen 3000 series

[thigobr]

There were some problems like the "segmentation fault" bug and some poor motherboard designs (Asus Prime X370Pro I looking at you!)
Unfortunately I was unlucky and affected by both but still my first gen Ryzen system was worth it! It was a big performance uplift vs my previous I5 3570K for my professional workloads (Android development)

I think Ryzen 3000 will be good... I am only still on the fence about the memory controller being moved to a separated die... But I am sure there are a lot of other goods to mitigate the drawbacks.

 

[Markfw]

I think a lot of the memory stuff worked itself out with Zen+. I got 16GB of G.Skill RAM that is supposedly Samsung D die rated for 3200MHz. I put it in and tried XMP and it worked without any problems. Maybe I just got lucky, but memory support with Zen+ seems to be much less of an issue.

Zen was a clean slate design on a fresh node. That is tough to pull off. It also had a lot of catching up to do. It would have been great, but maybe impossible to have launched something like Zen+ on the first try. Zen+ is what the first Zen should have been, particularly with the smooth XFR/boost clocks. But I think it is a bit disingenuous to think of the Zen launch and being "hugely disappointed".

I was lucky or just researched better. I used gskill samsung b-die from the beginning, and every Ryzen build I did last year and this worked perfectly, and at rated speed (some of the 3600 only did 3466, but all the 3200 did 3200)

 

[Thunder 57]

I was lucky or just researched better. I used gskill samsung b-die from the beginning, and every Ryzen build I did last year and this worked perfectly, and at rated speed (some of the 3600 only did 3466, but all the 3200 did 3200)

I realized the mistake before I put it together. There was a very similar SKU listed as compatible. I figured since I had all the parts already I may as well give it a shot. Works great and was super easy. I did think about returning it and getting B die, but I figured I shouldn't have too much trouble getting to at least 2933. Turns out there was no trouble at all, and it ended up saving me about $40-50 so I can't complain.

I've had good luck with Corsair and GSkill. Those are my go to companies for memory.

 

[DrMrLordX]

Recently, AMD was nice enough to sell us their first 7nm product: Radeon VII. Those of us who bought one or read between the lines on reviews found out about the Tjunction temperature reading from the card. How is this relevant to a speculation thread about Zen2? Consider this:

When Zen first launched, many of us 1700x and 1800x owners began to notice Tctl, which is a temperature reading exactly 20C above Tdie/package temp. To hear AMD's own words on Tctl:

https://community.amd.com/community/gaming/blog/2017/03/13/amd-ryzen-community-update

Consider carefully what AMD had to say about it back in 2017, and keep in mind that thermal throttling on models that had the Tctl offset was based off Tctl, not Tdie/package temp.

Fast forward to the future, with Radeon VII's two different temperature settings (Temp/Junction Temp). Junction Temperature, which is always higher, does NOT behave the same way, except that it also sets the curve for thermal throttling.

At idle, TJunction (or Tjunct) is about the same as Tdie. At load, Tjunct is around 25-30C higher than Tdie. I saw a guy at OCN use a hacked-together water-cooling solution for his Radeon VII, and even when he pushed his Tdie down to 40C during load, he's still showing 60C TJunct (20C delta). What gives?

It's all about them hotspots.

I had thought, back in 2017, that the Tctl we were seeing on the "overclocker"-oriented Zen chips might have been related to hotspots. AMD might have been having problems measuring temperatures across the entire die, so they provided themselves with a failsafe by assuming that, if the edge of the die (or the solder immediately contacting the die) had a temperature of X, that some point in the die might reach a temperature as high as 20C above that temperature. So if they throttled accordingly, they could protect the die. That was never established as a fact.

Now we have a 7nm process. Hotspots are a bigger problem with a smaller process. I don't know how AMD measures Tjunct - are they measuring die temperature from the die edge, and Tjunct from the thermal pad junction point? I don't know. But they're consistently showing higher temps for Tjunct. It also seems like it's very difficult to move Tjunct downward. People have moved it down maybe 5C on Radeon VII by replacing the stock graphite pad with liquid metal. And as I cited above, moving to water cooling brought it down by about 10C relative to Tdie. But what Tjunct is doing is to effectively protect the CPU from hotspot temps - either AMD is actually tracking hotspots effectively and showing us the temperatures, or they're using some kind of an estimation algorithm based on Tdie (instead of just adding +20C like they did on early Ryzen chips). Either way, they throttle based on that temp to protect the hottest areas of the die.

Zen2 will probably behave the same way.

From a practical point-of-view, the only way for us to cope with that is to try to cool the coolest areas of the die as best we can; those are probably the only accurate temps we can record anyway. During load, the hotspots on our Ryzen 3xxx CPUs may be 20-30C higher than anywhere else. So if "anywhere else" is 50-60C, then we may be in for some trouble. Especially when overclocking.

Based on my experiences moving from Vega FE (14nm) to Radeon VII (7nm), I can tell you that the average GPU temp on my 14nm card could easily stay below 75C with an undervolt and an extremely aggressive fan profile. Moving on to Radeon VII, under "similar" settings (I use quotes, because AVFS makes things really weird on Vega FE/Vega64), I can keep Tdie down in the same range while using a performance-oriented setting. Stock, temps are actually higher due to ridiculous voltage but I digress. The thing to keep in mind here is that GPU temp vs. GPU temp, 14nm and 7nm were about the same once I had the card locked in to a tune I liked for my setup. The difference is in the hotspots. Using my performance tune (1940 MHz) I get Tjunct values in the range of 100-102C. The GPU will throttle at around 105-110C Tjunct. Eww. Also keep in mind that Radeon VII is using maybe 50W less power than Vega FE in this comparative scenario.

So if I use my 14nm 1800x as a starting point, during a heavy load while overclocked to the highest speeds the chip will normally allow (4 GHz), I can easily get Tdie temps in the range of 65-70C, with Tctl being 20C higher every time. So if my Tdie temps on Zen2, fully overclocked to whatever clockspeed it allows under those settings, approaches 65-70C, I'm going to be seeing hotspot temps at (or estimated to be at) 95-100C. Or higher. Yow. And that's with an NH-d15 with a pair of 3000 rpm IndustrialPPC fans. All that solder and the heatspreader on the die may cause hotspotting to get even worse (as opposed to Radeon VII which is direct-die except for the graphite pad).

Bottom line, I do not think overclockers will be very happy with hotspots on their 7nm CPUs. We may have to push those "average" temperatures into the basement to prevent massive hotspot throttling, and that may, in turn, require us to dial back our overclocks or go for heftier cooling. Custom water may be a requirement.

 

[Topweasel]

Dr. X I think you are on a good path with that. But I am wondering AMD included a lot of dead space in Zeppelin specifically to act as internal heatsinks and keep the uncore stuff from contributing heat to the cores and vice versa. But I am not sure that will apply to Zen 2. In theory these chiplets should have very very little dead space and will be like 75-80% cores. So under a load and heavy OC scenario I am not sure this cooling concern will be as important.

 

[maddie]

Weren't the hotspots always there? We just were never exposed to them before. This, to us, huge jump in temps are just another way of seeing the true die temps. The actual circuitry doing the heavy lifting will always be a lot hotter than the average, and to a certain extent it varies with the actual job being done.

What am I missing here?

 

[Markfw]

I don't know about this whole hotspot thing. When I boot my Ryzen system, even with great cooling, be it a AM4 or a TR4, I see IDLE BIOS temps at 40-50c. Its doing NOTHING in BIOS. So these temps have to be totally wrong. Which is why I believed Ryzen master when in Windows, its idling at 30c or less.

 

[scannall]

Ryzen has a LOT more sensors onboard than anything before it. So yeah, you will get finer grained readings. That shouldn't be a surprise to anyone. This whole hot-spot thing is a big nothingburger.

 

[Fanatical Meat]

Ryzen has a LOT more sensors onboard than anything before it. So yeah, you will get finer grained readings. That shouldn't be a surprise to anyone. This whole hot-spot thing is a big nothingburger.

Never heard of this but I believe it.

What is a lot more?

 

[scannall]

Never heard of this but I believe it.

What is a lot more?

It's part of AMD's SenseMI technology. And why XFR works so well. Here's a video from AMD explaining SenseMI. AMD SenseMI Video

 

[Topweasel]

I don't know about this whole hotspot thing. When I boot my Ryzen system, even with great cooling, be it a AM4 or a TR4, I see IDLE BIOS temps at 40-50c. Its doing NOTHING in BIOS. So these temps have to be totally wrong. Which is why I believed Ryzen master when in Windows, its idling at 30c or less.

The hot spot idea is localized temperature sources. With Zen and Zen+ you have a CPU where less than 50% of the die is the cores. Those spots or the mem controllers and so on are big sources of heat. But they are localized in the die. Overall this isn't a big thing in the cooling and CPU temperature. But it is a worry in clockspeeds. The more isolated and shrunk down those parts of the CPU the harder it is to deal with those localized heat on top of the general cooling limiting max speeds.

 

[Markfw]

The hot spot idea is localized temperature sources. With Zen and Zen+ you have a CPU where less than 50% of the die is the cores. Those spots or the mem controllers and so on are big sources of heat. But they are localized in the die. Overall this isn't a big thing in the cooling and CPU temperature. But it is a worry in clockspeeds. The more isolated and shrunk down those parts of the CPU the harder it is to deal with those localized heat on top of the general cooling limiting max speeds.

So you are saying that idle in the BIOS, with custom water cooling, its really is running 50c somewhere ??

 

[Topweasel]

No, wasn't touching on the BIOS experience more describing what hot spotting was. Though keep in mind your CPU doesn't have the power management capabilities it does while in an OS. So there is a real chance it's running at full power in BIOS and therefore hot.

 

[Markfw]

No, wasn't touching on the BIOS experience more describing what hot spotting was. Though keep in mind your CPU doesn't have the power management capabilities it does while in an OS. So there is a real chance it's running at full power in BIOS and therefore hot.

Except in windows, at idle. many programs say the same thing, 50c or so, while Ryzen Master says 20c below what they say. So I believe Ryzen master, not bios, and not other programs.

 

[Topweasel]

Except in windows, at idle. many programs say the same thing, 50c or so, while Ryzen Master says 20c below what they say. So I believe Ryzen master, not bios, and not other programs.

Oh I see what your getting at. That's probably the offset, though I am not sure that's due to "hotspots" I believe AMD said the choice was made for better fan curves on 90w+ parts. I think this has more to do with stuff like Precision Boost. It doesn't work very well if the fans are "keeping up" with power output. By getting the fans to spin up earlier it gives the CPU some breathing room to boost the turbo and keep it going longer.

Now that I think of it, it is the perfect answer to my issue with the 9900k. With how Intel handles the PL2 and MCE, if you don't have really good cooling (180w-200w TDP) any level of multicore usage with cooling less than that will have the CPU pegged against the thermal limits Intel has set. Using an offset like this allows the CPU to balance itself more and give itself some room to breathe and not always be at it's thermal limit with most loads on a cheaper cooler. It also helps that PB doesn't allow the CPU to boost to nearly 2 times the rated TDP. But here you can actually use PB even if you only have a 90w cooler.

 

[DrMrLordX]

Dr. X I think you are on a good path with that. But I am wondering AMD included a lot of dead space in Zeppelin specifically to act as internal heatsinks and keep the uncore stuff from contributing heat to the cores and vice versa. But I am not sure that will apply to Zen 2. In theory these chiplets should have very very little dead space and will be like 75-80% cores. So under a load and heavy OC scenario I am not sure this cooling concern will be as important.

We will probably never know how many "dead spaces" exist in Zen or Zen+, much less Zen2. I can tell you that the chiplet design may make things more complicated wrt hot spots since there will be no direct die contact with the I/O die. The I/O die will have relatively low power density since total power consumption for that block of silicon should be low, and the size is pretty large. There's plenty of space for the heat to spread out laterally before entering the solder to be whisked away by the heatspreader and HSF/water block/etc. Not being able to move any significant amount of heat out of the chiplet in that fashion is going to be . . . interesting.

@scannall I disagree fundamentally with the idea that hotspots are a "nothingburger". It's not like AMD (or Intel) can magically spread power dissipation evenly across the die. If they could, then there would be no problem. It would be nothing more than a factor of die size versus the delta T between the die and whatever you are using (solder + IHS + HSF, direct die waterblock, etc.) to remove heat.

Hotspotting has always technically been in effect at every process level. But as you move to a smaller process, it's exactly as @Topweasel indicated: higher process density leads to higher power density. But there's more to it than that. Heat dissipation is non-uniform. Your first line of defense against a CPU overheating itself is heat moving from an active part of the die to an inactive part of the die. If the active part of the die becomes proportionately smaller versus the total area of the die without (necessarily) reducing the amount of heat being dissipated by the active part of the die, you lose lateral and vertical surface area for the purpose of internal heat dissipation. That requires a higher delta T between the active and inactive parts of the die, before heat can move out as quickly as it is being produced by the CPU.

For those of you who know anything about numerical methods of heat transfer within a 3d object, think of it as reducing node size by N amount while reducing power dissipated per node by only .xN where x is some number lower than 1. Your total power dissipation throughout the entire object might go down, but those temp values for the dissipating nodes will have to go up.

It's a problem with Radeon VII today, and I expect Zen2 to have issues with it down the road. Intel's 10nm and 7nm processes won't be any different.

 

[Kenmitch]

I don't know about this whole hotspot thing. When I boot my Ryzen system, even with great cooling, be it a AM4 or a TR4, I see IDLE BIOS temps at 40-50c. Its doing NOTHING in BIOS. So these temps have to be totally wrong. Which is why I believed Ryzen master when in Windows, its idling at 30c or less.

In bios it's doing something still. It's running full clockspeeds with no throttle down on cores and voltages.

 

[Fanatical Meat]

Noob question, given current reasonable cool what is the smallest a chip can get and still be cooled.
Assume that a chip manufacturing process does completely change
Assume cooling doesn’t involve nitrogen

 

[realibrad]

Noob question, given current reasonable cool what is the smallest a chip can get and still be cooled.
Assume that a chip manufacturing process does completely change
Assume cooling doesn’t involve nitrogen

I would imagine that its a function of heat vs surface area.

 

[moinmoin]

But what Tjunct is doing is to effectively protect the CPU from hotspot temps - either AMD is actually tracking hotspots effectively and showing us the temperatures, or they're using some kind of an estimation algorithm based on Tdie (instead of just adding +20C like they did on early Ryzen chips). Either way, they throttle based on that temp to protect the hottest areas of the die.

With Zen and the introduction of SCF (scalar control fabric) AMD also introduced a four digits amount of sensors, plenty of them likely for taking the temperature. Experience gathered with the Zeppelin dies likely also went into the layout of the chiplet and IOC dies, optimizing the exact placements of hotspots.

Never heard of this but I believe it.

What is a lot more?

There are officially "over 1300 sensors" per Zeppelin die.

 

[Fanatical Meat]

With Zen and the introduction of SCF (scalar control fabric) AMD also introduced a four digits amount of sensors, plenty of them likely for taking the temperature. Experience gathered with the Zeppelin dies likely also went into the layout of the chiplet and IOC dies, optimizing the exact placements of hotspots.


There are officially "over 1300 sensors" per Zeppelin die.

Crazy to wrap my head around that number and the small size, plus all the other stuff.

 

[DrMrLordX]

Noob question, given current reasonable cool what is the smallest a chip can get and still be cooled.
Assume that a chip manufacturing process does completely change
Assume cooling doesn’t involve nitrogen

Possibly 3nm?

 

[jpiniero]

FWIW it's expected now that MS will talk about their next gen console at E3 even though the launch isn't until well into next year. You can probably be assured now that the formal announcement of Zen 2 Ryzen will be before then; even if the actual launch date is 7/7.

 

[John Carmack]

And Francois Piednoel's take on Zen 2...hmm.

His take on Intel's 10nm problems from more than 10 months ago:

I can't say it because I am under NDA. It is fixable, and my estimate is that it should be fixed shortly.

I called him a clown then and his new take hasn't changed my opinion.

 

[IEC]

"Taiwan is not impressed"...

Okay, 老外. The internet is not impressed with your statement.