I would see that exactly the other way around. The 6-core parts with 2 defective ones would go into consoles. I'm still of the opinion that a 4c8t Zen2@3ghz is more than enough for consoles. But I see your point. A top 12c ryzen could use 2 chiplets that have 1 or 2 defective cores but are high leakge eg. clock high so not best option for server or consoles. But if that much binning is needed, 7nm as tsmc must yield very poorly.
EDIT: In fact the next consoles most likely will be 14nm still. I could see the gpu being 7nm but even that would be an issue price wise.
AdoredTV talks about yields of the 8C chiplet in his recent video. Anyone can verify those numbers by themselves using e.g. this
Die Yield Calculator. I used the same parameters as he did (
300mm wafer,
7.1mm x
10.1mm = 71.71mm² chiplets,
0.4#/cm² defect density, all other parameters
default) and got the following chart:
As we can see, the max number of (working) dies is 817 and 617 are good dies (with 8 working cores) and 200 are defective dies (with 6/4/2/0 working cores). Yields go up over time, so why wouldn't Sony/MS use fully working 8C chiplets (with medium clock speeds and medium/low leakage) if they have decided to go the chiplet route. It wouldn't make much sense to disable those working cores just because of power savings. They can however control how game developers are allowed to use them and keep the power usage at desired levels.
On that wafer there are 200 defective dies and if that AdoredTV leak turns out to be true, most of these partially working ones would be used for best selling (mainstream) AMD Ryzen 3000 SKUs. Fully defective dies and partial dies (#60 in that wafer, yellow ones) would be used as dummy (i.e. filler) dies.
The most important reason why it makes sense to add consoles to the mix is that then AMD would have
a much larger pool of wafers of those 8C chiplets to bin and cherry pick the best ones for EPYC/TR and good ones for higher end AM4. Sure, Sony/MS could have gone with a monolithic design using only one 4C Zen2 CCX but why not benefit from this chiplet revolution by using fully working 8C chiplets?
Obviously none of this leak is still confirmed but adding almost every CPU product to the mix would allow AMD to get all the manufaturing benefits of this chiplet approach. As I see it, without consoles onboard this would miss a lot of the potential it has. Monolithic (Ryzen 3000) design would not really have a large enough pool to really cherry pick those best clocking chips in volume as AdoredTV has also many times mentioned in his videos. The more I think about this, the more sense it makes from AMDs point of view.
For a while I had my doubts about this chiplets (without IMCs) for the destop market approach (EPYC Rome made much more sense because how Naples is laid out) but now it all seems to come together almost too nicely. Sure, memory access latencies would be a little higher in some cases than using a monolithic design but plausible 32MiB of L3 cache per each chiplet will help a lot. Sure, cross CCX latencies would be lower for a monolithic chip but then there wouldn't be a large pool of chiplets to cherry pick those high clocking ones (in large enough quantaties). PS5/XBT wouldn't use anything with DDR4 controllers on-die. Sure this leak has some details that may be wrong but the overall approach looks solid to me.
If this turns out to be true, I was't really expecting AMD to be this ambitious at this point (later for sure) but if they got Sony (and MS) onboard (for PS5/XBTwo) then It would be a huge win for them. Then AMD's main goal would be to gain a lot more market share in this generation.