Speculation: Ryzen 3000 series

[Mopetar]

Do I think that all 3xxx Ryzen CPUs will be on 7nm Zen 2? No. I think there's a possibility that the R3s will still be Zen+, though 6c minimum.

That's a reasonable argument to indicate that they need not necessarily use Zen 2 for the R3 3000 series chips, but I think your argument relies on the reasoning that R3 is the bottom of the barrel.

However, AMD still has Athlon positioned below that (the 200GE for example) so there is a still a bit of a dumping ground for old parts.

 

[amd6502]

FWIW I'm expecting the APU's to be 12nm Zen+ as expected and launch directly whereas the 'real Zen2' 3000 series will launch late may/early june around computex. The modular Zen2 APU's from 19Q3 would really confuse the Zen+ APU's, would be much better if those were still called 2000 series.

I don't really think it's that confusing. 3000 just marks that it's released in 2019, with the leading generation being 3rd gen. 12nm APUs will occupy Athlon, and Ryzen 3 through Ryzen 5 APUs. 7nm MCM APUs will be Ryzen 7.

For CPUs (if no small iGPU turns out to be included in chiplet controller die), it would make sense that Ryzen 5 would be a mix of Zen+ (4c+6c and maybe even lower clocked 8c Pinnacles refresh) and 7nm chiplet salvage MCM. In this case the Ryzen 5 lineup would be the most interesting, as it would offer a wide variety and range of threads on one hand and frequency+ipc on the balancing hand.

For Ryzen 7 CPUs it could be all 7nm or it could be mostly 7nm and high binned 12nm PR available on the bottom of the price range.

For threatripper it's going to be all 7nm and high clocks, high nr of cores, and beefy FPUs, cache, IPC.

 

[Spartak]

Having no six core Zen2 CPU's would be a big mistake. Many people don't need 8 cores but do appreciate high st performance.

Really, R3/5 still on Zen+ makes no sense whatsoever and would muddle their offerings.

People are always pissed with Intel for disabling SMT on their lower end CPU's, well this would be way worse.

 

[Glo.]

Adored source was very clear the consumer Zen2 would be 'all 7nm'. So an integrated 8CCX or 2x4CCX is all but a given. The question is how they add the second eight cores. A chiplet added to the CCX-module makes the most sense to me.

There is a possibility that Chiplets on Mainstream platform can work without IO die. 16C/32T AM4 CPU can be based on chiplets, without IO die, in this theory.

 

[Spartak]

There is a possibility that Chiplets on Mainstream platform can work without IO die. 16C/32T AM4 CPU can be based on chiplets, without IO die, in this theory.

Chiplets dont have IO so there would be need for a separate northbridge/ memory controller.
if the chiplets have IO themselves then it's an integrated die. It's one or the other.

Or both. If one 8CCX has an integrated IO die, the other could be a chiplet, or a GPU. Two integrated dies with NB/IMC glued together would probably not work very well.

 

[Spartak]

Personally I'm still at a loss why they didnt go the 6CCX route with an integrated 2x6CCX die for CPU and 6CCX+GPU for APU.

I'm not seeing a monolithic 2x8CCX integrated die happening and 16 for the desktop is overkill right now anyway.

 

[maddie]

I don't understand how people can say that the current price strategy didn't work well. AMD is one of the few stocks that have ended up extremely positively this past year. I think it's up over 70% or so.

How is that not a tremendous success?

I also must have missed how people can be so relatively certain yields will be so poor the next Ryzen won't include 7nm parts. I don't really get that. Surely their strategy so far has been to reuse exactly in order to maximize yields. Not fully functioning dies end up in the lower end products. All TSMC has to do is churn out dies and AMD will package accordingly.

What am I missing above?

Not missing anything. For sure, within a few days, some of us will have conveniently forgotten their present positions.

 

[DrMrLordX]

@mattiasnyc:

Only the horribly ill-informed would believe that Ryzen3 won't include 7nm parts. AMD has specifically stated that Matisse (Ryzen 3) is on 7nm, and made a big to-do when GF cancelled their 7nm process about moving the chips to TSMC.

 

[maddie]

Personally I'm still at a loss why they didnt go the 6CCX route with an integrated 2x6CCX die for CPU and 6CCX+GPU for APU.

I'm not seeing a monolithic 2x8CCX integrated die happening and 16 for the desktop is overkill right now anyway.

Whenever at a loss to understand the why of something, check all that you hold true. You might find a known known isn't and then really begin to understand.

 

[darkswordsman17]

Personally I'm still at a loss why they didnt go the 6CCX route with an integrated 2x6CCX die for CPU and 6CCX+GPU for APU.

I'm not seeing a monolithic 2x8CCX integrated die happening and 16 for the desktop is overkill right now anyway.

I think some of it was risk aversion for the new process (8 core modules being enough but should be able to get a lot of those dice on 7nm so if yields were bad, they'd still get a decent amount of dice), and also that it just is a good building block. I think they view it as 8 cores being better than 6 at this point (if for no reason other than marketing), and that they were looking at what the base core block they'd need to address most markets. They'll have older cheap APUs for super budget stuff, but they have consoles and other embedded markets (which they're putting a lot of emphasis on now), and I think they see it as being a good balance for APUs where they're doing modules of CPU and GPU. I think that's their APU plans going forward (and single monolithic ones will be behind and on older processes).

AMD has established themselves as offering more cores than Intel. And Intel was doing 6 cores (think even 8 now, right?) in mobile, so AMD couldn't be looking to put 6 cores (even if it might be more than enough) there.

I think 8 core CPU module + GPU module is going to be a great plan, as I think it'll help them in laptops and SFF systems, which will help them get in with OEMs. They'll be able to undercut Intel + Nvidia designs in cost while offering comparable performance (other than battery life, but the lower cost and possibly smaller overall form factor should enable a larger battery to compensate, and if AMD can get their idle power down more it could mean better battery thanks to good but not equal efficiency and bigger battery). And it lets them get established before Intel likely offers similar when they get their dGPU (and as AMD has found, its better to be established than to try to make it into a market).

 

[beginner99]

There is a possibility that Chiplets on Mainstream platform can work without IO die. 16C/32T AM4 CPU can be based on chiplets, without IO die, in this theory.

The chiplets shown are far to small to have any IO included. That is given.

What is also given is that AMD in their event first presented Zen2 as a chiplet design. There was no talk of a product. It was clear. Zen2 = chiplet. Only after that did AMD talk about a product, namley Rome. It's straight from the horses mouth. All zen2 products are chiplet based. I don't get why we are even debating this. The only reason is that one guy at GF claiming to have only seen one IO die in production (note: production, we aren't talking about development), the one for Epyc. Makes sense. The ryzen IO die will be 1/4th of the size. Facoring in yield they can hence produce them more than 4 times faster or said otherwise they simply haven't started mass producing them because after all launch is H2 2019.

 

[Adawy]

http://www.e-katalog.ru/AMD-3300.htm
http://www.e-katalog.ru/AMD-3300X.htm
http://www.e-katalog.ru/AMD-3600.htm
http://www.e-katalog.ru/AMD-3600X.htm
http://www.e-katalog.ru/AMD-3700.htm
http://www.e-katalog.ru/AMD-3700X.htm
http://www.e-katalog.ru/AMD-RYZEN-9-MATISSE.htm

Edit: Actually it's the entire line-up except the R9 3850X.

 

[DrMrLordX]

Huh.

They aren't taking pre-orders so it doesn't look like a scam per se. Sadly they do not list an SKU and they have no pictures.

 

[krumme]

http://www.e-katalog.ru/AMD-3300.htm
http://www.e-katalog.ru/AMD-3300X.htm
http://www.e-katalog.ru/AMD-3600.htm
http://www.e-katalog.ru/AMD-3600X.htm
http://www.e-katalog.ru/AMD-3700.htm
http://www.e-katalog.ru/AMD-3700X.htm
http://www.e-katalog.ru/AMD-RYZEN-9-MATISSE.htm

Edit: Actually it's the entire line-up except the R9 3850X.

Add a 3850x and that would be freaking awesome. But I don't trust aprox 25% fmax uplift. Interesting days ahead.

 

[PotatoWithEarsOnSide]

3.9GHz base, 4.7GHz turbo, 16c/32t @ 125w TDP.
R7 2700X is 3.7GHz base, 4.35GHz turbo, 8c/16t @ 105w.
Extrapolating that, a 5% increase in base clock takes is to ~111w, so we're talking about a 12% increase in power for 2x the number of cores on a clock for clock basis.

I'm not convinced by that TBH. I'm mindful of the fact that to have a boost facility then your base clock has to be running below the TDP rating itself in order to leave headroom for boosting. Combine that with the increased boost over a 2700X and we're talking power efficiencies much greater than the past slides, which I would be taking with a pinch of salt anyway. One aspect of that was the 1.25x performance at the same power. Doubling the core count, and increasing base clocks, for only a 19% increase in power, well that's clearly going to exceed that 1.25x performance figure. My crude calculations suggest around 140w TDP to be at that 1.25x ratio. Otherwise we have to believe that a 16% reduction in power is going to cost ~30% in performance.
(3.7x(105/105)x8x1.25 ~ (2.75x(105/125)x16)
That is totally bizarre power scaling.
And the thing is, this is before we even account for IPC gains counting as part of that performance increase.

The numbers do no add up at all.

Edit: its possible that I have overlooked something fundamental in my calculations. Feel free to correct me if you see anything obviously wrong.

 

[AtenRa]

Hmmm if those are legit, im hoping for the 3600 to be at 65W TDP and perform at 2700X level.

Edit.

Again if those are legit, im speculating prices to be close to Ryzen 1 launch , with the 8C 16T SKUs at $200 to $250 and 16C 32T R9 at $499.

 

[Adawy]

Add a 3850x and that would be freaking awesome. But I don't trust aprox 25% fmax uplift. Interesting days ahead.

If AMD could at least manage to match Intel's single core performance while offering it at a lower price, that would be a great deal.
Just 6 days remaining until CES, all in good time.

 

[dacostafilipe]

I find it strange, that two sources have the same exact numbers for all those SKUs where AMD is certainly still fine-tuning them all.

Seems like they used AdoredTV's numbers, that all.

 

[coercitiv]

The numbers do no add up at all.

Edit: its possible that I have overlooked something fundamental in my calculations. Feel free to correct me if you see anything obviously wrong.

It's not your numbers, it's theirs 🙂

Back when the leaks first surfaced I outlined just how far fetched everything was with a reverse calculation that put 2Ghz 64C Zen 2 at 100W, meaning the 7nm was the gift that kept on giving. The relative estimates I used for the voltage drop were taken from my 1600X. They are a tad extreme but still bound to real silicon behavior.

Let's look at the 3700X though, and infer some power figures for the new Epyc based on Zen2, see how it all fits:

• based on this leak, two Zen chiplets can do 4Ghz within 130W
• that means 1 chiplet = 65W @ 4Ghz
• that leads to 1 chiplet = 12W @ 2Ghz, assuming a ~40% drop in voltage
• hence this leak tells us 64C Epyc does 2Ghz @ 100W (or 3Ghz @ 210W if we assume a ~25% drop in voltage)

So AMD manages to double the core count, make wider cores, increase frequency and still get lower power than on 14nm.

 

[lixlax]

3.9GHz base, 4.7GHz turbo, 16c/32t @ 125w TDP.
R7 2700X is 3.7GHz base, 4.35GHz turbo, 8c/16t @ 105w.

...

The numbers do no add up at all.

Edit: its possible that I have overlooked something fundamental in my calculations. Feel free to correct me if you see anything obviously wrong.

If we completely ignore the uncore power consumtion and just take it as 8 cores @3,7GHz consume 105W in 2700X form. With perfect 2x reducion at the same clockspeed would be 52,5W consumed, then add 8 more cores and you get again 105W and then finally bump up the clockspeed ~5% for 19% more power. Doesn't look out of this world if we look at it this way.

But then again we have no idea how the 7nm works when close to fmax frequncies (on desktop CPU's), it could be 5% higer clocks at the same power or it could be 30%.

The AdordTV's leak still seems fake to me though, like somebody just used logic and took some effort to put those specs together (so they look reasonable). Although I wouldn't be suprised if the real products are going to be similar compared to what the leak says.

 

[moinmoin]

3.9GHz base, 4.7GHz turbo, 16c/32t @ 125w TDP.
R7 2700X is 3.7GHz base, 4.35GHz turbo, 8c/16t @ 105w.
Extrapolating that, a 5% increase in base clock takes is to ~111w, so we're talking about a 12% increase in power for 2x the number of cores on a clock for clock basis.

You are using Intel's way to calculate TDP while AMD includes some boost headroom in its TDP. So trying to extrapolated from that is futil. 125W TDP can still be correct, just end up leaving less boost headroom than the one for 2700X did. Who knows how it is set up this time around.

Back when the leaks first surfaced I outlined just how far fetched everything was with a reverse calculation that put 2Ghz 64C Zen 2 at 100W, meaning the 7nm was the gift that kept on giving. The relative estimates I used for the voltage drop were taken from my 1600X. They are a tad extreme but still bound to real silicon behavior.

The big wildcard is the uncore/IOC which doesn't scale with cores but instead defines the base power consumption (like at idle) regardless of current performance level. The IOC isn't moving to 7nm so it should be close to current uncore behavior. Big jumps in optimization are unlikely especially since support for PCIe 4 should increase power consumption again.

 

[PotatoWithEarsOnSide]

I guess my doubts surround how AMD generated the figures in the earlier slides; 50% less power at the same performance, 1.25x performance at the same power.
The former is entirely believable due to the node shrink itself; my quick calculation had it at a 44% power saving IIRC.
The problem is that 1.25x performance figure. Unless its a core for core example, it doesn't seem to stack up; i.e. it is way too low if a 16c 125w TDP CPU exists. On a core for core basis, it simply shows that doubling power results in 25% performance increase, which is more believable; 25% higher clock speed would take you to 4.6GHz, which is within the referenced spec turbo, but you'd be looking at 210w to run 16c at that speed.
IMO, they cherry picked the figures for their slides. I want to believe that you can get both at the same time, so that power efficiency and that performance improvement, but I'm not seeing AMD sell anything that'll need 210w to meet that. I'm not saying that they need to either, but I'm slightly dubious.
It could be that the 4.7GHz listed is a single/dual core turbo, and it probably is.
I guess at this stage AMD only need to offer >4.7GHz ACT on 8c CPUs, since even at the listed base of 3.9GHz a 16c CPU is going to take the performance King title.

Edit: I should add that if rumoured IPC increases (10-15%) are included in that 1.25x figure, then it works out more like a 9-13% increase from base clocks to ACT. That's 4.25-4.4GHz for 210w on 16c.
Not sure that can be right.

 

[PotatoWithEarsOnSide]

Regarding the uncore. I suspect that it remains at relatively high base consumption level. None of my above numbers would make any sense if it weren't the case. The cores themselves must be using very little power at all. This presents an opportunity and a problem. The opportunity is in excellent upscaling of core count potential, but the problem resides in not being able to be power efficient in the laptop market. I honestly don't know how AMD could resolve that quandary, but I suspect that's where their future focus has to be.

 

[moinmoin]

Just like efficiency is not a stable value at any frequency but best efficiency is limited to a specific frequency range, the figures of 50% less power and 25% more performance are not generally true but best cases for specific setups.

 

[moinmoin]

Regarding the uncore. I suspect that it remains at relatively high base consumption level. None of my above numbers would make any sense if it weren't the case. The cores themselves must be using very little power at all. This presents an opportunity and a problem. The opportunity is in excellent upscaling of core count potential, but the problem resides in not being able to be power efficient in the laptop market. I honestly don't know how AMD could resolve that quandary, but I suspect that's where their future focus has to be.

I don't see where you see the problem. Yes, the cores are already very power efficient. That means in the mobile market all the room for further optimization is in the uncore. The changes done to Raven Ridge also point to where that room lies, removing IO features that were included on Zeppelin, decreasing L3$, simplifying the topology.

Power usage of the uncore is also a big issue with Epyc and Threadripper (see power consumption at idle) so it's very likely that the IOC has been found to be the more efficient approach (likely simplifying the topology). The chiplets may be as efficient as they can get with minimal area for uncore, while any further IO can be selected and optimized as part of a connected specialized IOC.