- Oct 22, 2004
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As rumoured, Intel's 8-core i9-9900K is around the corner, and it is widely expected that it will surpass Ryzen 7 in both single-thread and multi-thread performance, due to higher IPC and frequency. What will be AMD's response?
If there is no response, and Intel retakes a clear lead, AMD will lose momentum on the desktop until 7nm, which may mean 6 months or more of stagnation.
We know that AMD has reserved the 2800 model number in their line-up, and it seems widely suspected that this may have been done in anticipation of Intel's 8-core. So, I guess many, like me, expect a response.
We also know that AMD's current 12LP die does not fully exploit the 12LP process. In particular, it is exactly the same size as the 14LPP die, and my understanding is that they changed very little of the layout, keeping it mostly unchanged, and took advantage of improved transistors only.
Could it be that this was just a first step, with a more thoroughly redone 12LP revision forthcoming? In particular, there should be opportunity for higher density by using the 12LP design libraries, and a smaller optimised chip may allow higher frequencies. My thinking goes like this: Lisa Su wants a yearly cadence for the 2000-series, but 12LP readiness does not support a full optimisation for the process in time. So she puts two teams on it; one to do a simple transfer of the 14LPP design, using the same libraries, and one to do an optimised shrink using 12LP libraries, and possibly further design optimisations. The first team targets a 2018-Q2 release, while the second targets a refresh coming 6 month later, nicely coinciding with Intel's 8-core launch.
Also, note that "Picasso" is expected as the 12LP refresh of the "Raven Ridge" APU. Presumably, "Picasso" is designed with 12LP libraries for optimal density and efficiency. If so, AMD will have to do the 12LP design work for the CCX anyway.
If there is no response, and Intel retakes a clear lead, AMD will lose momentum on the desktop until 7nm, which may mean 6 months or more of stagnation.
We know that AMD has reserved the 2800 model number in their line-up, and it seems widely suspected that this may have been done in anticipation of Intel's 8-core. So, I guess many, like me, expect a response.
We also know that AMD's current 12LP die does not fully exploit the 12LP process. In particular, it is exactly the same size as the 14LPP die, and my understanding is that they changed very little of the layout, keeping it mostly unchanged, and took advantage of improved transistors only.
Could it be that this was just a first step, with a more thoroughly redone 12LP revision forthcoming? In particular, there should be opportunity for higher density by using the 12LP design libraries, and a smaller optimised chip may allow higher frequencies. My thinking goes like this: Lisa Su wants a yearly cadence for the 2000-series, but 12LP readiness does not support a full optimisation for the process in time. So she puts two teams on it; one to do a simple transfer of the 14LPP design, using the same libraries, and one to do an optimised shrink using 12LP libraries, and possibly further design optimisations. The first team targets a 2018-Q2 release, while the second targets a refresh coming 6 month later, nicely coinciding with Intel's 8-core launch.
Also, note that "Picasso" is expected as the 12LP refresh of the "Raven Ridge" APU. Presumably, "Picasso" is designed with 12LP libraries for optimal density and efficiency. If so, AMD will have to do the 12LP design work for the CCX anyway.
Pure wishful thinking?
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