Skylake/Broadwell Roadmap Update @Vr-zone

[Lepton87]

Hmmm.... well, I guess it's hard to know what the 65 W TDP LGA model in the roadmap refers to then. I guess it could be either one. It would be simpler if the roadmap in the OP was more clear on that. :\

But if it's the one you refer to, does it mean that Broadwell-K has been scrapped? Because then there is no mentioning of it on the roadmap.

Also, is there any point in having it unlocked, if it's 4 cores with GT3 and Iris Pro, and only rated at 65 W TDP? How high CPU frequency can you reach within that power envelope anyway, with that quite beefy iGPU consuming power too?

What kind of thinking is that? How is TDP relevant at anything other than stock clocks? Think about it, it is as if I had to stay within 140W TDP envelope while my CPU draws over 2x that when overclocked.

 

[Fjodor2001]

What kind of thinking is that? How is TDP relevant at anything other than stock clocks? Think about it, it is as if I had to stay within 140W TDP envelope while my CPU draws over 2x that when overclocked.

Obviously they are not going to clock the unlocked SKU at much lower frequency than it is capable of, just to claim a lower TDP.

It's like if Intel would have set the default base clock on the 4770K to 3.0 GHz instead of 3.5 GHz, and rate it at ~65W instead of 84 W. Would that make sense to you as well?

 

[erunion]

Obviously they are not going to clock the unlocked SKU at much lower frequency than it is capable of, just to claim a lower TDP.

It's like if Intel would have set the default base clock on the 4770K to 3.0 GHz instead of 3.5 GHz, and rate it at ~65W instead of 84 W. Would that make sense to you as well?

Intel carries a whole line of 65w parts.

If Broadwell-K is targeted at All in Ones, 65w tdp makes sense. But making it unlocked should allow DIYers to increase performance in an ATX case.

I suppose OEMs will lock the clocks at the motherboard/BIOS level for all in ones?

 

[Fjodor2001]

Intel carries a whole line of 65w parts.

If Broadwell-K is targeted at All in Ones, 65w tdp makes sense. But making it unlocked should allow DIYers to increase performance in an ATX case.

I suppose OEMs will lock the clocks at the motherboard/BIOS level for all in ones?

Then why not release a locked SKU for the OEMs rated at 65 W TDP, and an unlocked SKU for the DIY:ers rated at 95 W (or similar)? I.e. same SKU market segmentation as Intel has used so far.

 

[Galatian]

I'm still looking forward what Broadwell with Iris Pro will bring to the table. Consider that huge L4 Cache. It might actually make sense for some programs to be run on a 65W Broadwell chip with Iris Pro then a 84W Haswell or even Skylake chip.

 

[Fjodor2001]

Only 4-4.5 months until Skylake is available in the stores, and still we know nearly nothing about it. Unprecedented. I wonder when we can expect more details on it? IDF in Shenzhen, China on April 8-9? Leaks on technology and not just roadmaps 1-2 months ahead of that?

 

[ninaholic37]

Skylake sounds like an oxymoron :hmm: :awe:

 

[ehume]

Skylake sounds like an oxymoron :hmm: :awe:

Not if you're from Oregon. Check out pictures of Crater Lake. Sky lake, indeed.

 

[imported_ats]

Ouch. That is brutal. Haswell reduced costs over Ivy Bridge, without a change in node, more than Broadwell will reduce costs over Haswell with a change in node

Didn't Intel make a HUGE to-do about how their 14nm was not only in keeping with Moore's Law but that it actually accelerated it? WTF happened with 14nm broadwell then?

After this does people still believe 14nm is cheaper than 22nm ?? In Q4 2015 Broadwell (smaller die) will reach the same cost as Haswell in Q2 2014.
Transistor price may fallen but actual product price is not, even with a smaller die size.

Don't confuse cost per mm2 and cost per transistor. Newer processes are almost never cheaper per mm2 than prior processes without some external factor (change in litho method: smaller source wl or EUV, wafer size, etc).

Also the proper cost curve comparison point for broadwell is not haswell but ivybridge. Both are on newly ramping processes. Comparison to the cost curve for Haswell is comparing ramping process vs ramped process in which case the ramped process will almost always have the better curve.

Also remember that these are cost scaling curves that have been timing adjusted/overlayed on each other and do not necessarily represent current costs for either haswell nor ivy bridge.

What should be noted is that broadwell is on track to have lower costs than ivy bridge at the same point in its ramping schedule and to eventually also have lower costs than haswell in its ramping schedule.

Both of which say that 14nm has lower cost per transistor than 22nm, and actually re-affirms everything Intel has said about 14nm being lower cost than 22nm.

TL;DR: learn to read graphs before commenting on them and making incorrect conclusions.

 

[mrmt]

Ouch. That is brutal. Haswell reduced costs over Ivy Bridge, without a change in node, more than Broadwell will reduce costs over Haswell with a change in node

Didn't Intel make a HUGE to-do about how their 14nm was not only in keeping with Moore's Law but that it actually accelerated it? WTF happened with 14nm broadwell then?

Intel botched Broadwell big time. The question is whether Skylake and Cherry Trail are also botched.

 

[witeken]

Don't confuse cost per mm2 and cost per transistor. Newer processes are almost never cheaper per mm2 than prior processes without some external factor (change in litho method: smaller source wl or EUV, wafer size, etc).

Also the proper cost curve comparison point for broadwell is not haswell but ivybridge. Both are on newly ramping processes. Comparison to the cost curve for Haswell is comparing ramping process vs ramped process in which case the ramped process will almost always have the better curve.

Also remember that these are cost scaling curves that have been timing adjusted/overlayed on each other and do not necessarily represent current costs for either haswell nor ivy bridge.

What should be noted is that broadwell is on track to have lower costs than ivy bridge at the same point in its ramping schedule and to eventually also have lower costs than haswell in its ramping schedule.

Both of which say that 14nm has lower cost per transistor than 22nm, and actually re-affirms everything Intel has said about 14nm being lower cost than 22nm.

TL;DR: learn to read graphs before commenting on them and making incorrect conclusions.

There was actually a question about this a the earnings call:

Stacy Rasgon - Sanford Bernstein
Got it. And so my follow-up, I want to ask maybe more general question on 14 versus 22. So for 14-nanometers, you’ve shown a lot of charts showing normalized cost per transistor dropping below trend. Obviously wafer cost is going up quite a bit, but your density seems to be increasing even faster and that’s going down. But that’s a normalized basis. At the same time, we’ve had yields and obviously you have taken a bit longer to get into place. We have factory ramps that seem to be hitting more than normal in the first half of the year. Would you say that the all-in costs of the lifetime of 14-nanometers is actually is going to turn out to be lower than the all-in cost of 22?

Brian Krzanich - Chief Executive Officer
Hey, Stacy. I would take you back to the graph I showed at the investor meeting because I actually a non-normalized cost that showed Broadwell relative to other products at the same stage of manufacturing. And so what that chart shows is the churn up in the first half of this year. So the early stage of the Broadwell ramp because of some of the old issues that we’ve talked about, it is higher. On a non-normalized basis, it’s a higher cost. But by the time we get into the back half of the year on a non-normalized basis, Broadwell actually is less expensive than those other products at the same stage of their life.

Stacy Rasgon - Sanford Bernstein
So you think if I integrate that curve over the lifetime, the integration unit will be lower?

Stacy Smith - Chief Financial Officer
Hey, Stacy. We’ll go ahead and answer that question. But I just want to remind you, we are trying to take two questions per person, please.

Stacy Rasgon - Sanford Bernstein
Sure. Thank you.

Brian Krzanich - Chief Executive Officer
So, I haven’t done a volume weighted ramping, or a volume weighted cost comparison. I’ve just looked at it in the curves that I showed you. So, I guess a lot of it depends on how much volume happens after we get to that point of parity and improvement. But I think that the cost per transistor and the fact that we are investing that in lower die sizes and more features, we think we are getting super high performance and very cost effective product on 14-nanometer.

 

[Idontcare]

TL;DR: learn to read graphs before commenting on them and making incorrect conclusions.

Seriously? That's how you want to take my post, like I'm some idiot who couldn't possibly have factored all those points in (plus a few others that aren't common knowledge) before making my synopsis?

:| OK.

 

[myocardia]

Don't confuse cost per mm2 and cost per transistor. Newer processes are almost never cheaper per mm2 than prior processes without some external factor (change in litho method: smaller source wl or EUV, wafer size, etc).

Also the proper cost curve comparison point for broadwell is not haswell but ivybridge. Both are on newly ramping processes. Comparison to the cost curve for Haswell is comparing ramping process vs ramped process in which case the ramped process will almost always have the better curve.

Also remember that these are cost scaling curves that have been timing adjusted/overlayed on each other and do not necessarily represent current costs for either haswell nor ivy bridge.

What should be noted is that broadwell is on track to have lower costs than ivy bridge at the same point in its ramping schedule and to eventually also have lower costs than haswell in its ramping schedule.

Both of which say that 14nm has lower cost per transistor than 22nm, and actually re-affirms everything Intel has said about 14nm being lower cost than 22nm.

TL;DR: learn to read graphs before commenting on them and making incorrect conclusions.

lmfao, you just told an electrical engineer who works in the CPU industry to learn to read graphs about CPUs.

 

[jdubs03]

lmfao, you just told an electrical engineer who works in the CPU industry to learn to read graphs about CPUs.

yeah i call that barking up the wrong tree.

 

[III-V]

lmfao, you just told an electrical engineer who works in the CPU industry to learn to read graphs about CPUs.

He was a process engineer... he made EE's dreams a reality.

 

[Redentor]

Cannonlake during 2017 and Skylake Refresh during 2016 ... ?

https://translate.google.com/transl...10nm-forse-solo-nel-2017-inoltrato&edit-text=


Original source http://gulfnews.com/business/technology/intel-to-launch-10nm-chips-in-early-2017-1.1443856

- We have been consistently pursuing Moore’s Law and this has been the core of our innovation for the last 40 years. The 10nm chips are expected to be launched early 2017 -

 

[witeken]

Cannonlake during 2017 and Skylake Refresh during 2016 ... ?

https://translate.google.com/transl...10nm-forse-solo-nel-2017-inoltrato&edit-text=


Original source http://gulfnews.com/business/technology/intel-to-launch-10nm-chips-in-early-2017-1.1443856

- We have been consistently pursuing Moore’s Law and this has been the core of our innovation for the last 40 years. The 10nm chips are expected to be launched early 2017 -

You should be careful to distinguish between rumor and speculation. There is no basis for SKL Refresh. The last public disclosure from Intel (Intel semiconductor fellow Bohr and CFO S. Smith) is that 10nm is on track.

Your source also says:

He said that Cherry Trial is the 14nm for smartphone and tablets and will be available in the second half of the year. [CT is shipping right now, so will launch in Q2]

Khalifa said that Skylake architecture will be launched by end of this year.[Roadmaps say early Q3]

Obvious conservatism is obvious. Intel (Stacy Smith, BK) has said they will not disclose any specifics about 10nm until Investor Meeting in November, so take this with a grain of salt.

Closer to reality: Intel's 10nm start-up costs imply that production will start at the end of the year, so I'd bet on a Q3'16 launch.

 

[Phynaz]

Ouch. That is brutal. Haswell reduced costs over Ivy Bridge, without a change in node, more than Broadwell will reduce costs over Haswell with a change in node

Didn't Intel make a HUGE to-do about how their 14nm was not only in keeping with Moore's Law but that it actually accelerated it? WTF happened with 14nm broadwell then?

I would say Intel is still having large issues with 14nm. The question is will 14nm v2 fix them or will 14nm be a problem for Intel for its entire lifetime.

 

[Phynaz]

You should be careful to distinguish between rumor and speculation. There is no basis for SKL Refresh. The last public disclosure from Intel (Intel semiconductor fellow Bohr and CFO S. Smith) is that 10nm is on track.

Your source also says:


Obvious conservatism is obvious. Intel (Stacy Smith, BK) has said they will not disclose any specifics about 10nm until Investor Meeting in November, so take this with a grain of salt.

Closer to reality: Intel's 10nm start-up costs imply that production will start at the end of the year, so I'd bet on a Q3'16 launch.

They kept saying 14nm was on track until products didn't show.

 

[Fjodor2001]

Khalifa said that Skylake architecture will be launched by end of this year.[Roadmaps say early Q3]

Less than a month ago the public roadmap from Intel was 2015H2 for Skylake, presented at CES 2015:

So that could be the end of 2015, if we are to believe Intel's public roadmaps only (which you seem to prefer, at least when it suits you), and not the one leaked through VR-Zone in the OP.

The last public disclosure from Intel (Intel semiconductor fellow Bohr and CFO S. Smith) is that 10nm is on track.

That's old and obsolete info. Latest news from an Intel official is the Intel representative in the article saying 10 nm will be released in 2017.

 

[witeken]

They kept saying 14nm was on track until products didn't show.

No, they didn't.

Places where they said they have yield issues that I cared to remember:

*Q3'13 earnings call
*IM'13
*August 11 '14
*IDF'14
*IM'14
*Other interviews and earnings calls where Brian Krzanich admitted a 6 month delay

 

[Redentor]

From SemiWiki
https://www.semiwiki.com/forum/content/4243-intel-launch-10nm-chips-early-2017-a.html

- My guess is that you will see products with 10nm silicon in the second half of 2017 which means we will again be on 14/16nm for 2016 -

 

[jpiniero]

Intel could release a small amount of 10 nm Core M at the end of 2016 if they feel like they need to (in order to placate Wall St) like they did with Broadwell Core M at the end of 2014. But they still need to pay off the 14 nm fabs.

1H 2017 just makes too much sense.

 

[witeken]

From SemiWiki
https://www.semiwiki.com/forum/content/4243-intel-launch-10nm-chips-early-2017-a.html

- My guess is that you will see products with 10nm silicon in the second half of 2017 which means we will again be on 14/16nm for 2016 -

He's talking about foundries' 10nm. Also, this person has a very big bias against Intel. Take this sentence, for example:

I really am glad we are all calling it 10nm but as you know not all 10nm processes are created equal (Who Will Lead at 10nm?).

That does not make any sense to me. If your node does not meet 10nm standards, and it instead comparable to a 20nm node successor, then it should not be called 10, but 20*0.7=14nm. How this misleading can make someone happy is beyond me.

 

[witeken]

But they still need to pay off the 14 nm fabs.

Those are paid off long ago. And 22nm was used longer than planned, so those (using 22nm 6 months longer and 14nm 6 months shorter) cancel each other out.