Ryzen 2 slide in KitGuruTech video

[DrMrLordX]

If CMT.
8-core to 16-core.

No. As for the meme, such 2010! Much wow!

 

[NostaSeronx]

No.

Well first off, CMT is naturally more efficient than SMT. So, pretty much it is a forgone conclusion. Who wins the final x86 war will be who goes CMT first in the quad-ALU design phase. Bulldozer was a huge battle win for AMD, it would be a shame if Intel in 2019 goes CMT and wins the war.

RISC-V will be replacing x86 at both Intel and AMD in 2020~2021 from my inside view. (2025-2026 for those launches)

 

[DrMrLordX]

Well first off, CMT is naturally more efficient than SMT. So, pretty much it is a forgone conclusion. Who wins the final x86 war will be who goes CMT first in the quad-ALU design phase. Bulldozer was a huge battle win for AMD, it would be a shame if Intel in 2019 goes CMT and wins the war.

RISC-V will be replacing x86 at both Intel and AMD in 2020~2021 from my inside view. (2025-2026 for those launches)

So much wrong here. So much wrong.

 

[IRobot23]

Why is AMD so quiet about pinnacle ridge?

 

[CatMerc]

Well first off, CMT is naturally more efficient than SMT. So, pretty much it is a forgone conclusion. Who wins the final x86 war will be who goes CMT first in the quad-ALU design phase. Bulldozer was a huge battle win for AMD, it would be a shame if Intel in 2019 goes CMT and wins the war.

RISC-V will be replacing x86 at both Intel and AMD in 2020~2021 from my inside view. (2025-2026 for those launches)

And that's how we got Bulldozer.

There were so many design trade offs that had to be made to implement CMT, it made the entire thing worthless. It's good in theory only.

 

[gOJDO_n]

And that's how we got Bulldozer.

There were so many design trade offs that had to be made to implement CMT, it made the entire thing worthless. It's good in theory only.

It's not the CMT what made Bulldozer a inefficient, but the rest of the architecture. I expect AMD to reimplement it in Zen2 or Zen3 together with SMT for a quad thread module or core...

Sent from my SM-G935F using Tapatalk

 

[CatMerc]

It's not the CMT what made Bulldozer a inefficient, but the rest of the architecture. I expect AMD to reimplement it in Zen2 or Zen3 together with SMT for a quad thread module or core...

Sent from my SM-G935F using Tapatalk

The rest of the architecture was done the way it was to accommodate CMT's strengths and weaknesses. You know how the L2 cache was slow? That was because it had to connect and remain coherent between two core. That's just one example of the trade offs CMT forced.

AMD's engineers didn't just suddenly forget how to make a great core design. K7 was made like it was for a reason, and the designers of Bulldozer knew full well the strength of high IPC designs.

While some mistakes were addressed in later iterations, the core idea was just not viable. I don't see a CMT design being better than Excavator.

 

[William Gaatjes]

And that's how we got Bulldozer.

There were so many design trade offs that had to be made to implement CMT, it made the entire thing worthless. It's good in theory only.

I wonder if in the future we have the luxury of having so much cores that we no longer need CMT or SMT or hyper threading.
Stripped down cores , but so many of them that everything can be optimized and minimized for maximum speed and throughput.
Even if it would mean indvidual cores would stall, there would still be enough to run threads on.
But that would only make sense when the memory can accessed concurrently as if cache from a given core can access simultaneously the memory.
I wonder what IBM will come up with, with the new POWER 10.

 

[Elixer]

no way it stays on AM4 if it's official... AM4+ for sure

can't wait to not be able to find a X400 series board!!

Why do you think that?
AMD did say AM4 until 2020...

Besides, adding more cores doesn't necessarily mean you need a new socket. It has 1331 pin slots, and I bet there are quite a few of them that aren't currently being used by 1st gen Zen.

 

[IRobot23]

There won't be AM4+ in 2018.

 

[NostaSeronx]

The rest of the architecture was done the way it was to accommodate CMT's strengths and weaknesses.

Nope, the Bulldozer design was made because it was cheap. It was built up from Alpha 21264 and K8, both designs were well known to AMD. AMD wanted to build upon high frequency designs. Which clustered multithreading allowed in a multi-core design. As it was more efficient than standard CMP and didn't have the issues Intel had with P68.

You know how the L2 cache was slow?

The L2 was slow as it was meant to be the LLC. Which is awkward, but it is also area effective. No L3 cache meant more area for other things like a GPU. If AMD wanted it to be optimal they would have targeted the L2 @ 256Kbyte.

Essentially, there was a a rework to the Bulldozer-Excavator design that was never implemented. Which rather than targeting ~3.5 GHz operation, it would have targeted a ~5 GHz operation. This design was close in functionality to Zen. It was planned for the 32nm 2009 release, while the old design would have been on 45nm in 2007. Except, it didn't happen because 32nm PDSOI was downgraded to a low power node at GlobalFoundries.

 

[IRobot23]

CMT is not efficient simple scenario is Jaguar vs Bulldozer.
At least not in FPU, unless you don't need FPU then you are good to go with CMT.

You have to admit that AMD ZEN core pretty die/power/performance efficient.

 

[dark zero]

I call it: the slides are real, but the wattage will get increased by 35% at least.

 

[Yotsugi]

I wonder if in the future we have the luxury of having so much cores that we no longer need CMT or SMT or hyper threading.
Stripped down cores , but so many of them that everything can be optimized and minimized for maximum speed and throughput.
Even if it would mean indvidual cores would stall, there would still be enough to run threads on.
But that would only make sense when the memory can accessed concurrently as if cache from a given core can access simultaneously the memory.
I wonder what IBM will come up with, with the new POWER 10.

Manycore is a meme, really.

 

[CatMerc]

We already have manycore.

It's called GPU's.

 

[Yotsugi]

We already have manycore.

It's called GPU's.

GPUs are actually the opposite: a few very, very wide cores with hundreds of execution units in each.
Things like KNL, SW26010 or PEZY SC2 are the actual manycore processors.

 

[CatMerc]

GPUs are actually the opposite: a few very, very wide cores with hundreds of execution units in each.
Things like KNL, SW26010 or PEZY SC2 are the actual manycore processors.

Eh, I see where you're coming from. I just see them both as answers to the same problem, so even if technically distinct, I lump them together.

 

[UncleCrusty]

Bulldozer was a huge battle win for AMD

wat

RISC-V will be replacing x86 at both Intel and AMD in 2020~2021 from my inside view. (2025-2026 for those launches)

It would be fascinating to see what Intel / AMD could do with a high-performance RISC-V implementation. AMD is currently a member of the foundation - they could be playing with the idea.

 

[tential]

I can just *pray* that slide is official. If it is, WOW, AMD has done it again! 12C/24T, at around 5Ghz? HOT! I want one... or several. (Probably the 2800.)

I remember thinking earlier
"What if AMD went over 8C/16T in a mainstream part?"
Poor intel.
They scrambled to get to 8C/16T and AMD could be going full steam ahead.

Intel is probably going "PLEASE STOP!!! DUDE WE WERE SELLING 4C/8T CPUS and making a KILLING!!!!! STOP IT!!!!!!

 

[CatMerc]

Let me put it this way. If these specs are true, this is literally the greatest bamboozle I've ever seen out of this industry. This would come from absolutely nowhere, shutter a megaton of logical assumptions that built up over the years, and shake up the CPU market even harder than Zen 1 did.

The chances of something so extraordinary happening, not to mention so close and without any leaks, does not compute.

 

[Yotsugi]

and without any leaks, does not compute.

The "leaks" are coming whenever AMD wants it.

 

[CatMerc]

The "leaks" are coming whenever AMD wants it.

Depends on if the samples are out in the wild yet. Doesn't appear to be the case, which is strange for a supposed February launch.

 

[Yotsugi]

Depends on if the samples are out in the wild yet. Doesn't appear to be the case, which is strange for a supposed February launch.

Again, the "leaks" are coming whenever AMD wants them to.

 

[William Gaatjes]

Manycore is a meme, really.

It is, but the future is inevitable.

We already have manycore.
It's called GPU's.

I was really talking about scalar and superscalar processors and not vector processors.

 

[Yotsugi]

but the future is inevitable

I've heard this for ages and yet nothing still changed.