SB can take a lot of punishment
.Freudian slip?
I just want SB... first 4 words
your brain goes... what do I want? SandyBridge.
Supposed to say you want bulldozer/AMD to give intel a run for its money right?
Also unless Im miss informed, I thought most people couldnt get stable 5ghz with their SBs... only very few got that far on air (lucky ppl with good chips).
. As for what i want, i go where the performance is, i have no brand loyalty although Corsair is preferred as i've only had good experiences with both their products and customer service.When Ivory Bridge and Z68 come out and will beat IMO bulldozer 8 core 16 with HT.
I think 8 core can beat 12 core bulldozer,, just imo.
Yes, if you are using the same manufacture. As Intel is doing it for themselves, I doubt AMD will get it cheaper from a company that is putting on their markup.
Beating 8.2 GHz on a Cedar Mill Netburst Celeron that is designed purely for extremely high clocks? Maybe, seeing the AMD record is ~7 GHz, but not likely.
Right if you think about that a larger part is more likly to contain a failure. But on the other hand you have to consider also the selling price. You have a 75% higher failure rate but three times of the selling price. That is why this makes sense with a new process that does not yet have mature yields.
This is extremly likly. AMD record is 7 GHz. Now just add the design based clock advantage of 30% (22/17) to this and you have already 9.1 GHz without the gain from a much better process (32 nm, high-k, etc.). And that is what I predict: You will see 9+ GHz from AMD Bulldozer parts in extreme overclocking. The Bulldozer parts will already emerge with higher clocks than Cedar Mill. And it is a design for extremly high clocks similar to Cedar Mill.
You mean gate count per pipeline stage.
yeah but you know the old saying "there's no smoke without fire"your faith has serious problems; everything is still at rumor level.
According to GF slides, they expect a 40-50% advantage in perf/watt compared to the current 45nm process (although I'm not sure if they already include the Low-K update for 45nm):
So this is one variable. Another is gate delay. But I don't have GF's gate delay numbers for their processes at the likely operating voltage range, but it should roughly be 70% of their 45nm SOI gate delay (linear scaling factor).
Llano should have ~35M T per core, 110M incl. L2, so ~75M for the L2 and other stuff (e.g. power gating ring).
BD has 213M T per module, minus 150M for the L2+rest there remain 63M T for the 2 cores.
Both for BD and Llano AMD stated 0.8 to 1.3V. There is even more extensive clock gating in BD, which might reduce dynamic core power even more (maybe 20% vs. K10).
http://pc.watch.impress.co.jp/img/pcw/docs/430/341/html/13.jpg.html
Assuming nearly constant uncore power consumption (reduced by process, increased by # of T and clock frequency), a BD module on a X8 might have 150% of the power budget of a Thuban core and a BD core 75% respectively. With less L2 power (IIRC it is an 8T design in BD) but likely more relative leakage we might just look at roughly estimated core power relations:
BD : 63M T at 150% power (2 cores)
BD : ~32M T at 75% power (1 core avg)
hypothetical 10h 6C at 32nm: ~35M T at 100% power
10h: ~35M T at 166% power (inverse of 40% lower perf/watt)
So if a Thuban core has about 13.3W TDP (95W-15W uncore), it would use ~8W in 32nm at the same clock. This would be 100%.
A BD module at the same voltage and maybe 20% higher clock (FO4 reduction!) might use ~12W. 4 Modules would use ~50W then. Now scaling back to 80W again (20W per module) could add even another 20% of clock frequency headroom (about 45% combined). Thus a 4GHz Zambezi at 95W is not unlikely.
Could someone please check my numbers?
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