Discussion RDNA4 + CDNA3 Architectures Thread

[DisEnchantment]

With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits

History for llvm/lib/Target/AMDGPU - llvm/llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. - History for llvm/lib/Target/AMDGPU - llvm/llvm-project

github.com

Or Phoronix

More AMD "GFX940" Enablement Work Landing In LLVM - Phoronix

www.phoronix.com

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

Question - Speculation: RDNA3 + CDNA2 Architectures Thread

Man I have been dying to make this one for a while now. First rumours for RDNA3 are here so new thread time! Just going to start off with this one for now: kopite7kimi on Twitter: "@VideoCardz Ah, I mean a simple mcm design with 10240 cores is not enough. Because the lift from RDNA2 to RDNA3...

forums.anandtech.com

 

[poke01]

Tim Cook manages to whip a new A-series chip out of his teams every year.

well the difference is the the A chip goes into the flagship iPhone so they HAVE to release one every year, whereas these low end SoCs do not make AMD much money.

 

[itsmydamnation]

Tim Cook manages to whip a new A-series chip out of his teams every year. It would be more doable with staggered cadences on CPU/GPU tech. At 18 months for each a yearly SoC would always get at least a new CPU core or a new GPU core while also being able to tweak the other a small bit.

It is also 100% fixed device. x86 socs have to support way more protocols, way more attached devices/types ,way more configurations. If AMD only had to deliver 1 model of laptop against one spec of DIMM on one board design with no PCI-E attachment etc etc.......

i know nothing about building SOC's but if its anything like my areas of expertise then honestly 70% of the time of a complex program of works is spent in integration/ test / debug , end to end verification etc. building any one standalone thing is pretty easy.

edit: by time i mean elapsed time , not effort time within a schedule.

 

[poke01]

It is also 100% fixed device. x86 socs have to support way more protocols, way more attached devices/types ,way more configurations. If AMD only had to deliver 1 model of laptop against one spec of DIMM on one board design with no PCI-E attachment etc etc.......

i know nothing about building SOC's but if its anything like my areas of expertise then honestly 70% of the time of a complex program of works is spent in integration/ test / debug , end to end verification etc. building any one standalone thing is pretty easy.

edit: by time i mean elapsed time , not effort time within a schedule.

I'm leaning towards AMD just doesn't care that much for the low end SoCs. Your argument falls apart cause ARM/Qualcomm/MTK also have to design their SoCs for a range of devices and specs/protocols and they still manage annual cadence

 

[itsmydamnation]

I'm leaning towards AMD just doesn't care that much for the low end SoCs. Your argument falls apart cause ARM/Qualcomm/MTK also have to design their SoCs for a range of devices and specs/protocols and they still manage annual cadence

No they don't , it's not even close.

 

[Mopetar]

AMD could certainly make an SoC that's more limited compared to what's typically expected for an x86 APU. Strix Point isn't something that has to socket in to a platform with a wide variety of other hardware components. It's also a high-end market segment that could justify the more rapid release schedule.

AMD can use the more expensive, high margin product to offset the costs of developing the hardware designs that eventually find their ways into the low-end mass market APUs that are AM5 (or whatever other socket) compatible, but can be released when appropriate as opposed to some fixed yearly schedule.

My point was mainly that you can have a yearly product release with a more relaxed schedule for the different teams working on the major components for an SoC by having each offset the schedule such that every year's release will have at least one next generation component. Some buyers may upgrade around that if it's important or others will wait until what they care most about most. It can also be a good pipe cleaner product for new nodes and gaining some design experience with them for other products or future generations of other products that are developing for that node as well.

 

[adroc_thurston]

My point was mainly that you can have a yearly product release with a more relaxed schedule for the different teams working on the major components for an SoC

Oh no you see IP wasn't ever the problem.
The actual SoC is. They don't have enough people to crank out 3 parts yearly.

 

[inquiss]

Oh no you see IP wasn't ever the problem.
The actual SoC is. They don't have enough people to crank out 3 parts yearly.

Will they soon or they've decided not to try?