Discussion RDNA4 + CDNA3 Architectures Thread

[DisEnchantment]

With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits

History for llvm/lib/Target/AMDGPU - llvm/llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. - History for llvm/lib/Target/AMDGPU - llvm/llvm-project

github.com

Or Phoronix

More AMD "GFX940" Enablement Work Landing In LLVM - Phoronix

www.phoronix.com

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

Question - Speculation: RDNA3 + CDNA2 Architectures Thread

Man I have been dying to make this one for a while now. First rumours for RDNA3 are here so new thread time! Just going to start off with this one for now: kopite7kimi on Twitter: "@VideoCardz Ah, I mean a simple mcm design with 10240 cores is not enough. Because the lift from RDNA2 to RDNA3...

forums.anandtech.com

 

[adroc_thurston]

What are the chances of a RDNA 4 refresh (on N4 or N4X etc.) ?

0.
AMD doesn't have the volume to drop refreshes anywhere.

 

[basix]

Yeah, I do not expect any refresh either. N48 gets already pushed towards its max. frequency anyways (9070 XT).

Stuff like a 9070 GRE 12 / 16 GByte is also already there to fill up some lineup holes and maximize salvaged yield of N48.
Maybe we'll see a 9060 16 GByte in the future. That will be it for RDNA4.

 

[marees]

Maybe we'll see a 9060 16 GByte in the future. That will be it for RDNA4

I see possibility of N44 derivatives extending into RDNA 5 era as the AT3 / 10060xt is lpddr based (& hence could suffer some performance regressions)

 

[ToTTenTranz]

Maybe we'll see a 9060 16 GByte in the future. That will be it for RDNA4.

Some rumor mills keep insisting on the Q1 26 release of a N48 with GDDR7 and increased power budget for 10-15% higher core clocks.

I see possibility of N44 derivatives extending into RDNA 5 era as the AT3 / 10060xt is lpddr based (& hence could suffer some performance regressions)

I think / hope AMD isn't going to raise many waves around the LPDDR5X versions of AT3 and AT4, unless these chips can take on Samsung's (still hypothetical) 12.7MT/s memory.
406GB/s and 203GB/s sound like the bare minimum bandwidth AT3 and AT4 should have.

 

[basix]

I see possibility of N44 derivatives extending into RDNA 5 era as the AT3 / 10060xt is lpddr based (& hence could suffer some performance regressions)

N44 could live on the bottom end of the lineup. But mainly due to N4P. A 9060 non-XT with 16 GByte would be perfect for that (28 CU salvage, only 3.0 GHz boost, cost optimal 18 Gbps GDDR6).

Memory bandwidth should not be an issue for AT3 and AT4. Quad-Channel LPDDR6 delivers up to 690 GByte/s (14.4 Gbps which is advertised by Cadence already). A 9060 XT delivers 640 GByte/s.
Sure, RDNA5 needs to deliver enhanced bandwidth efficiency but I think that will happen. Why?
- AT4 = 256...345 GByte/s with 12 CU (192bit LPDDR6 10.67...14.4 Gbps)
- AT3 = 512...690 GByte/s with 24 CU (384bit LPDDR6 10.67...14.4 Gbps)
- AT2 = 768...864 GByte/s with 36 CU (192bit GDDR7 32...36 Gbps)

If AT4 and AT3 are bandwidth limited, AT2 would it be as well.

Salvage or mobile variants of AT3 and AT4 could use (fast) LPDDR5X instead of LPDDR6. This will be more of a power efficiency and cost question. As ToTTenTranz mentioned, 200 & 400 GB/s sound like a minimum bandwidth requirement. But 12.7 Gbps LPDDR5X could be hard to buy, maybe mobile variants will go down to 10.7 Gbps (which is available from all LPDDR5X manufacturers). 171 & 342 GByte/s is not much. But if salvaged (e.g. 10 & 20 CU for AT4 and AT3 respectively) and lowered clockrates for mobile (e.g. 1.2x lower) we get into the right range relatively to a full-chip and higher clockrate variant for desktop cards.

 

[SolidQ]

Steve talking about sales RX 9xxx vs 5xxx in Australia
Also about market share

 

[regen1]

https://videocardz.com/newz/amd-fluid-motion-frames-3-afmf3-has-been-spotted-in-drivers-files

 

[basix]

Hm, AFMF3 brings even more AI to the table?

 

[RTX2080]

Steve talking about sales RX 9xxx vs 5xxx in Australia
Also about market share

What's catching my attention is, at 4:30 he says they are not expecting any new CPU or GPU product launch during the rest of this year.

 

[MrMPFR]

Lmao it's RDNA4 that is massive.
They've bolted one limited OoO straight from CA-510 onto a GPU.

I am not to take this literally correct? No hits for CA-510 + RDNA 4 online.

Yeah OoO memory accesses are a huge deal.

 

[jpiniero]

What's catching my attention is, at 4:30 he says they are not expecting any new CPU or GPU product launch during the rest of this year.

Yes. I suspect the 50 Super got delayed mostly because of (gambling) that the tariffs get overturned.