Discussion RDNA 5 / UDNA (CDNA Next) speculation

[adroc_thurston]

But I'd prefer the fun stuff too

sorry pal, 'fun' is an evil word and is banned at AMD.

IDK, +30% clock would have put it right in 4090 space

Clocks are not universal across workloads doe.

 

[Kepler_L2]

It's very frustrating. And RDNA 5 seems to only amplify this.

RDNA 2 was a brief moment of hope that AMD had the IP and momentum to actually compete for the halo. Then RDNA 3 happened lol.

@Kepler_L2
Any info on RDNA 5 Render Backend? Still RB+ or something more chonk?

AFAIK they did a gfx11 style cutting of fixed-function stuff to move more towards compute.

 

[Tangopiper]

sorry pal, 'fun' is an evil word and is banned at AMD.

Touché

Clocks are not universal across workloads doe.

And neither are shaders - especially when you have occupancy issues! But yeah, I'm not saying N31 would have beaten the 4090, but definitely gotten close. Not that it would matter - NV had a 4090 Ti sitting on a shelf just waiting to go.

AFAIK they did a gfx11 style cutting of fixed-function stuff to move more towards compute.

Interesting. I considered this but wasn't sure just how drastic a change RDNA 5 was going to be. Thank you for the input.

I wonder if NVIDIA are going to pull their thumb out and do something drastic with Rubin, or it's just 3nm Blackwell with new Tensor and RT IP, plus fixed regressions. Do we have a Rubin thread?

 

[adroc_thurston]

 

[Kepler_L2]

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gfx13 XCD gaming version when

 

[adroc_thurston]

gfx13 XCD gaming version when

gaming brothas too broke for all that HBM4

 

[branch_suggestion]

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Since MALL is dead what are they gonna shove in the base dies now?

 

[adroc_thurston]

Since MALL is dead what are they gonna shove in the base dies now?

L2

 

[branch_suggestion]

L2

Deadass didn't think they would take it off the XCDs.
But obvious move seeing cache scaling is kill.

 

[adroc_thurston]

Deadass didn't think they would take it off the XCDs.

this is gfx12-derived, each SE (or SA) is backed by formerly-L1$ write buffer.

 

[branch_suggestion]

this is gfx12-derived, each SE (or SA) is backed by formerly-L1$ write buffer.

I imagine GFX13 probably builds upon this shift.
MI500 still has a lot of low hanging fruit to make gains from MI400.

 

[adroc_thurston]

I imagine GFX13 probably builds upon this shift.

duh

MI500 still has a lot of low hanging fruit to make gains from MI400

they can just like triple the scale-up domain size

 

[branch_suggestion]

duh

they can just like triple the scale-up domain size

Each device is also like 3x stronger, and over 3x the worldsize and you got a 10x stronger rack in a calendar year.
Scaleup/out is going to struggle to keep up with the gains of raw compute and memory spam.

 

[adroc_thurston]

Scaleup/out is going to struggle to keep up with the gains of raw compute and memory spam.

and everyone will also struggle with power density. too bad!

 

[branch_suggestion]

and everyone will also struggle with power density. too bad!

Good thing AMD are ahead of the curve through the sheer genius of... using a bigger rack to spread heat out.
Big brain.

 

[branch_suggestion]

Also funny that AMD will have its 2nd generation of N2 class products out before NV moves on from N3.
Learn to hybrid bond you plebs.

 

[adroc_thurston]

Good thing AMD are ahead of the curve through the sheer genius of... using a bigger rack to spread heat out.

Still gonna be 'ard.

Also funny that AMD will have its 2nd generation of N2 class products out before NV moves on from N3.

it's kind of an NV tradition.

 

[stayfrosty]

MI455x is 20PF of dense FP8 right?... the OpenAI guy in the presentation had a slide comparing sparse nubers but i'm pretty sure that's wrong.

 

[nguoihanoi]

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HBM on top?

 

[NTMBK]

It's so factually wrong RDNA5 generation has zero purpose-built dGFX parts.
They're at zerodies level of competing with NV.
RDNA2 had 4 dies. RDNA3 3 dies. RDNA4 2 dies.
RDNA5 brings us a novel solution of having literally zero dies built around competing in dGFX. yay.

I mean it looks like Nvidia aren't shipping any new GPUs until at least 2027, so we're seeing the same novel solution on both sides

(Fuck AI)

 

[marees]

I mean it looks like Nvidia aren't shipping any new GPUs until at least 2027, so we're seeing the same novel solution on both sides

(Fuck AI)

probably more than a year's delay to the consumer GPU roadmap for both AMD & Nvidia due to the memory shortage situation

 

[ToTTenTranz]

AT0 is a cloud gaming part. Those rejects have all those gfx bits because they'll be used for cloud gaming.

Of course, but the fact that AMD is making AT0 a very big chip for gaming means that AMD cares about gaming which was the point.

 

[inquiss]

Of course, but the fact that AMD is making AT0 a very big chip for gaming means that AMD cares about gaming which was the point.

It cares about getting a bit contract with a hyperscaler. But it's also proof that they don't make a chip specifically to combat add in card sales of Nvidia...

 

[ToTTenTranz]

But it's also proof that they don't make a chip specifically to combat add in card sales of Nvidia...

Which is not proof that AMD "doesn't care about gaming".

 

[inquiss]

Which is not proof that AMD "doesn't care about gaming".

I think you need to stop being concerned about the semantics of that word when people have explained to you multiples times what is meant by it. AMD do not care to specifically compete with Nvidia in add in card sales in any serious way. That's it.