Question Raptor Lake - Official Thread

[Hulk]

Since we already have the first Raptor Lake leak I'm thinking it should have it's own thread.
What do we know so far?
From Anandtech's Intel Process Roadmap articles from July:

Built on Intel 7 with upgraded FinFET
10-15% PPW (performance-per-watt)
Last non-tiled consumer CPU as Meteor Lake will be tiled

I'm guessing this will be a minor update to ADL with just a few microarchitecture changes to the cores. The larger change will be the new process refinement allowing 8+16 at the top of the stack.

Will it work with current z690 motherboards? If yes then that could be a major selling point for people to move to ADL rather than wait.

 

[TheELF]

Nope, small cores do not support it and Intel has disabled it on later production ADL chips.

Did they?!
Because I feel like if they did there would be topics in forums about what production numbers have it and which ones don't.
Unless you mean the microcode disable, but that disables it on all ADL cpus.

 

[Markfw]

Did they?!
Because I feel like if they did there would be topics in forums about what production numbers have it and which ones don't.
Unless you mean the microcode disable, but that disables it on all ADL cpus.

Only if you update your bios. Mine is still capable.

 

[TheELF]

Now we have to get into a bunch of assumptions. How will Intel distribute the same power limitation over more cores? Will the E cores stick with the same power and the P cores get less? Will the P cores stick with the same power and the E cores get less? Something in between?

Did we get any word from intel about power staying the same?
It could be using more, or it could have the voltage regulator thing that is supposed to reduce power by 25%

 

[dullard]

Did we get any word from intel about power staying the same?
It could be using more, or it could have the voltage regulator thing that is supposed to reduce power by 25%

I don't think that I've seen official Intel numbers. There have been plenty of rumors that are all over the place. For example, Wccftech seems to be sticking with these rumors:

• PL1 stays at 125 W base
• PL2 stays at 188 W in normal mode. But PL2 increases from 241 W to 253 W in performance mode
• PL4 decreases from 283 W to 238 W in normal mode. PL4 decreases from 359 W to 314 W in performance mode

Intel 13th Gen Raptor Lake Desktop CPUs Specs, Performance, Price, & Availability - Everything We Know So Far

Intel's 13th Gen Raptor Lake Desktop CPUs with Raptor Cove cores launch in 2022 & here's all the specs, prices, performance you need to know.

wccftech.com

Ultimately, this is motherboard and cooling system dependent anyways. Only those who have a great cooling system and run in performance mode will see the difference. That is, only enthusiasts. I assume the vast majority of people buying from OEMs won't have cooling systems that can handle the 5% higher PL2 in performance mode and thus won't be impacted much. It isn't like Dell or HP will redesign cooling for a 5% turbo peak power increase for a ~1% to 2% performance increase.

 

[TheELF]

Ultimately, this is motherboard and cooling system dependent anyways. Only those who have a great cooling system and run in performance mode will see the difference. That is, only enthusiasts. I assume the vast majority of people buying from OEMs won't have cooling systems that can handle the 5% higher PL2 in performance mode and thus won't be impacted much. It isn't like Dell or HP will redesign cooling for a 5% turbo peak power increase for a ~1% to 2% performance increase.

My point is more about this result we talk about, you assume that it is running under the same amount of power while it might be running with more.
The same goes for clocks, it does say 4.6Ghz but for early/engineering samples the info readout might be not at all correct so it might say 4.6 but actually be at 5Ghz or more.

 

[dullard]

My point is more about this result we talk about, you assume that it is running under the same amount of power while it might be running with more.
The same goes for clocks, it does say 4.6Ghz but for early/engineering samples the info readout might be not at all correct so it might say 4.6 but actually be at 5Ghz or more.

That is true. With a few more PL2 watts it might be 27% more performance instead of 25% before IPC changes. Ultimately, that is just too small of a difference for me to consider given the much bigger unknowns (i.e. clocks of the E cores).

 

[JoeRambo]

Did they?!
Because I feel like if they did there would be topics in forums about what production numbers have it and which ones don't.
Unless you mean the microcode disable, but that disables it on all ADL cpus.

Is AVX-512 Fused Off on Alder Lake Client Products?

AVX-512 will be fused off on Alder Lake.

www.intel.com

They don't even need to fuse it, just shipping them with newer uCode than the one that still is able to reenable it, and it's over, as it's impossible to downgrade uCode version.

EDIT: i have no idea if they carried out this yet, but i feel it is irrelevant question anyway, as anyone who wanted ADL with AVX512 already has one.

 

[TheELF]

EDIT: i have no idea if they carried out this yet, but i feel it is irrelevant question anyway, as anyone who wanted ADL with AVX512 already has one.

It is relevant though if we want to speculate on if rocket will have avx512 or not, if they didn't bother to disable it on adl they might also not have bothered to disable it on rocket.
edit: disabled meaning fused off, since microcode can also re enable it if intel ever wants to do that.

 

[IntelUser2000]

• Assume the E cores will keep the same power level. Thus, each P cores will go from power in the mid 20s to the lower 20s in watts at turbo (assuming all cores actively performing calculations). That drops the P cores performance down by roughly 6%. Then the Raptor Lake gets only a 29.3% gain.

Considering P takes 200 out of 250, reducing P is the way to go. Saying that E is for efficient MT performance but P taking most of the power makes no sense. It should at least by 50/50.

Actually due to slightly improved architecture, they might not need performance sacrifices while dropping clocks by 5%.

I do believe in MT E power per core will reduce slightly because it doesn't need to clock as high. So it'll go from 50 for 8 cores to 90 for 16 cores.

 

[DrMrLordX]

So it'll go from 50 for 8 cores to 90 for 16 cores.

At least for Alder Lake's implementation of Gracemont, Gracemont's efficiency seemed to drop off after ~3.2 GHz. Doubling the Gracemont core should permit Intel to lower clocks substantially while still pushing MT grunt in embarrassingly-parallel workloads. The two clusters probably won't pull 90W. Maybe more like 80?

 

[IntelUser2000]

The two clusters probably won't pull 90W. Maybe more like 80?

I am only expecting a small reduction for the E cores, just because it already takes a relative small amount, and it's better to lower the one that takes a greater portion, which is the P cores. P cores take up 200W by itself. Lowering 10% of that is 20W, which is worth quite a bit of extra E cores, while lowering 50W, is just 5W.

If you lower the P portion by 20%, that's 40W, which is almost another dual cluster. Pretty much solves TDP requirements for extra 8 E cores lol.

 

[TheELF]

I am only expecting a small reduction for the E cores, just because it already takes a relative small amount, and it's better to lower the one that takes a greater portion, which is the P cores. P cores take up 200W by itself. Lowering 10% of that is 20W, which is worth quite a bit of extra E cores, while lowering 50W, is just 5W.

If you lower the P portion by 20%, that's 40W, which is almost another dual cluster. Pretty much solves TDP requirements for extra 8 E cores lol.

Not sure if intel would want to do that, that sounds like a super sure way to mess with gaming performance especially with titles (or OSes) that don't work well with the new manager, you will get less clocks on the P cores so less FPS in games.
It could also affect general mixed multithreading workloads, the P cores handle things that are shorter length and that people have to wait for and that would make the waiting time longer even if the overall throughput would be higher.

 

[IntelUser2000]

Not sure if intel would want to do that, that sounds like a super sure way to mess with gaming performance especially with titles (or OSes) that don't work well with the new manager, you will get less clocks on the P cores so less FPS in games.

Either that or you cut E core power by half, which means you end up with under 10% MT performance gain, which nullifies the whole point.

In gaming and in applications that don't require lot of threads, of course it can give more to the P cores. Thread Director and application support will continue to improve. Alderlake is first generation, so why do people assume that it'll stay the same?

Hyperthreading on the Pentium 4 got most right, but it took Nehalem to really cut the scenarios which would create conflicts. It needed architectural changes to achieve that as well. Most people assumed Pentium 4's HT was all they could get.

 

[TheELF]

Either that or you cut E core power by half, which means you end up with under 10% MT performance gain, which nullifies the whole point.

Or, as I already said, intel will just increase the power by that 30-40W the additional e-cores use so that everything can run full clocks. If there are any manufacturing or any other efficiency increases it will be even less than that.

 

[Abwx]

I am only expecting a small reduction for the E cores, just because it already takes a relative small amount, and it's better to lower the one that takes a greater portion, which is the P cores. P cores take up 200W by itself. Lowering 10% of that is 20W, which is worth quite a bit of extra E cores, while lowering 50W, is just 5W.

If you lower the P portion by 20%, that's 40W, which is almost another dual cluster. Pretty much solves TDP requirements for extra 8 E cores lol.

They are relying on process perf/watt improvements such that they could shave about 30W from the current numbers, and then increase TDP to 250W up from 240W to have P and E cores clocked as they are currently.

This way they could get something like 8500 pts in CB R23 to add to ADL s scores, that s good for 30% MT perf improvement at somewhat better efficency, or not as bad inefficency...

 

[Hulk]

For some people, like me, the additional E's will be of great benefit and power shouldn't be a problem.

For example, when I'm editing in PS and simultaneously using PureRaw to process RAW images the E's will work on the RAW images in the background while the P will be utilized in a "bursty" manner while I edit.

Same thing will occur when I'm editing in the foreground while the E's are rendering video in the background. Most foreground applications that I use are well enough served by the 8 P's to keep me working/editing in real time while the E's take care of the background compute jobs I have going on.

I realize I'm just a single data point but 8/16 Raptor Lake perfectly fits my computational needs. I know that because I'm currently using a 12700K.

 

[LightningZ71]

Does it (16 e cores) perfectly fit your needs, or, is it overkill? Do you find yourself having to wait for that background task to complete because 4 e cores aren’t fast enough, or, do those background processes typically complete sooner than you have a need for their results?

Apple has chosen to use just a few E cores and just steadily increase the p cores in the M1 architecture. From what I’ve read, most users seem plenty happy with that so far.

I realize that there are certainly situations where an infinite number of E cores would serve some people, but where is the right balance? Is 16 going to be overkill?

 

[TheELF]

Apple has chosen to use just a few E cores and just steadily increase the p cores in the M1 architecture. From what I’ve read, most users seem plenty happy with that so far.

Apple has completely opposite reasons though for the e-cores, on ARM they are just there for down times where you don't need much CPU power so only the e-cores work and you save power.

 

[DrMrLordX]

For some people, like me, the additional E's will be of great benefit and power shouldn't be a problem.

For example, when I'm editing in PS and simultaneously using PureRaw to process RAW images the E's will work on the RAW images in the background while the P will be utilized in a "bursty" manner while I edit.

Same thing will occur when I'm editing in the foreground while the E's are rendering video in the background. Most foreground applications that I use are well enough served by the 8 P's to keep me working/editing in real time while the E's take care of the background compute jobs I have going on.

I realize I'm just a single data point but 8/16 Raptor Lake perfectly fits my computational needs. I know that because I'm currently using a 12700K.

Wouldn't 16P cores fit your workloads better?

 

[trivik12]

Any idea would DLVR help with better efficiency or Intel would be on the backfoot until Meteor Lake.

 

[tamz_msc]

Any idea would DLVR help with better efficiency or Intel would be on the backfoot until Meteor Lake.

Dlvr is supposed to be mobile only.

 

[TheELF]

Wouldn't 16P cores fit your workloads better?

It would if he would sit there adjusting affinity for each task each time it changes workloads but who wants to be doing that all the time.
The main selling point for thread director is that it keeps your desktop responsive, you keep the full computing power( of a previous model CPU) even while the e cores handle a heavy processing task.

 

[DrMrLordX]

It would if he would sit there adjusting affinity for each task each time it changes workloads but who wants to be doing that all the time.
The main selling point for thread director is that it keeps your desktop responsive, you keep the full computing power( of a previous model CPU) even while the e cores handle a heavy processing task.

That doesn't make any sense. At all. Why would he have to adjust affinity?

 

[biostud]

Wouldn't 16P cores fit your workloads better?

You mean 16 zen4 cores?

 

[TheELF]

That doesn't make any sense. At all. Why would he have to adjust affinity?

Read again what the HULK workflow is, any rendering task on a 16 core system would use all 16 cores lowering the response for the other more real-time task he needs to do.