Question Raptor Lake - Official Thread

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coercitiv

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Jan 24, 2014
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Hold on now, Ian specifically says "Next-gen" Atom cores here.
This wording isn't as specific as we'd like, Intel uses next-gen to describe a product gen as well. (eg: 10th gen uses same uarch as 6th gen, yet clocks improved dramatically) The difference is we didn't have a word for big cores at the time, so we were indeed specific when referencing cores in leaks.

Ian Cutress himself wasn't 100% sure whether this is RPL or MTL as proven by a subsequent tweet:
I'm beginning to think so too from the detail I have
Anyway, while it does make more sense to see a gradual increase in E-core clocks with each product gen, with a minor jump on RPL since uarch stays the same, Intel is very hungry for performance these days so IMHO anything is on the table. Even if 4.5+Ghz target is for MTL, it signals Intel's strategy on the desktop, meaning they will push as far as possible with RPL too.

12900KS is already doing 4Ghz on E-cores.
 

JoeRambo

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Jun 13, 2013
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It's not like they are far from 4.5Ghz. Currently situation with L2 cache being tied to L3 slice (and power delivery problems) is probably holding them back. Also they had additional year to finetune the core, so clocks could rise some due to those.

The main "strike" against clocks so high could be L1 cache latency, 3 cycles and 4.5ghz clocks don't go well together. But who am I to doubt, there were "experts" on this forum who claimed that Atom is 3Ghz affair and that did not age well.
 
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IntelUser2000

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Oct 14, 2003
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@LightningZ71 Gracemont is, at least for Alderlake. But Tremont doesn't show a big change in clocks.

Anyway the older Intel roadmap said both Gracemont and "nextmont" focus on higher frequencies. I just don't think 4.5GHz+ is coming with Gracemont.
 

dark zero

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Jun 2, 2015
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So much for dreams of increased efficiency on RPL. Then again, we get more performance... so I guess that's a good thing.
Call me crazy, but now I wonder what will happen if there are processors with only small cores, like Alder Lake -N. Since the latter only might jump up to Octa Core, seems that the next generation might go to 16 core.

And makes me wonder...Having 16 core (no matter if is small or big) isn't overkill?
 

LightningZ71

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Mar 10, 2017
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@LightningZ71 Gracemont is, at least for Alderlake. But Tremont doesn't show a big change in clocks.

Anyway the older Intel roadmap said both Gracemont and "nextmont" focus on higher frequencies. I just don't think 4.5GHz+ is coming with Gracemont.
Tremont, at least in Lake Field and Jasper Lake, was built on Intel's "10+" node, the same as Ice Lake. That node isn't exactly known for clocking very high or good thermals with cores that were designed for high clocks. Even then, Jasper Lake was able to boost Tremont to 3.3Ghz in the 6-10w TDP range, so I would expect that Intel 7 alone would get Tremont up to 3.5-3.6Ghz easily. Gracemont, being a typical intel improvement, is likely aimed at increasing clocks a bit as well, so, 4Ghz seems within the realm of reason. 4.5Ghz with a likely minor tweak to both the process and the core with a higher power and thermal budget seems believable. At that point, though, I think we can all stop thinking of the e-cores as having ANYTHING to do with power efficiency and instead see them as what they are, AREA efficiency targeted.
 

uzzi38

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Oct 16, 2019
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This wording isn't as specific as we'd like, Intel uses next-gen to describe a product gen as well. (eg: 10th gen uses same uarch as 6th gen, yet clocks improved dramatically) The difference is we didn't have a word for big cores at the time, so we were indeed specific when referencing cores in leaks.

Ian Cutress himself wasn't 100% sure whether this is RPL or MTL as proven by a subsequent tweet:
I know where the info comes from, it reads more like MTL gen than Raptor Lake.
 

nicalandia

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Jan 10, 2019
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What I would have liked was half the power on the P cores, and no E cores, but twice the P cores. 16 P cores @ 4 ghz at optimal power would be AWESOME.
Puget System did a test and they found out that no matter how much you scale the P cores, the e cores will always win in die area performance
 
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nicalandia

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There's more to life than area efficiency. Especially in a desktop chip.
Perhaps, but Intel weighed in the pros and cons


1646168727108.png
 

IntelUser2000

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Oct 14, 2003
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Tremont, at least in Lake Field and Jasper Lake, was built on Intel's "10+" node, the same as Ice Lake. That node isn't exactly known for clocking very high or good thermals with cores that were designed for high clocks.
Going above 4GHz is very different from going above 3GHz. Also I don't believe in Tremont being able to clock higher since they used Icelake node. Not at that level.
And they never claimed so, when for Gracemont and "nextmont" they said frequency is one of the goals.

Why do we expect easy 10% gains for Core when they are already at 5.2GHz? Transistor performance is not the limiter for clocks at that frequency.

This is the same line of thinking that led entirety of Intel to believe that they would easily reach 10GHz, when it takes a single core Netburst Celeron to reach 8.9GHz with absolutely exotic cooling.

I believe the single biggest contributor of Intel being able to reach 5.2GHz when it was previously watercooling territory even for Pentium 4's is that because not only the HSF technology has improved, but the size as well. They weigh over a kilogram now. And watercooling is far more common.

We still have people believing we'll go 5.6, 5.7 easily. "Oh just put it on a new node!" Considering the largest chip company believed so I am not surprised.
 

Hulk

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Oct 9, 1999
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Why do we expect easy 10% gains for Core when they are already at 5.2GHz? Transistor performance is not the limiter for clocks at that frequency.
Exactly. Over 4.7GHz (or so) has been high voltage, high power, high heat territory since processors have been reaching those frequencies and it still is. >5GHz is still in the zone of diminishing returns and it's highly doubtful that will be changing anytime soon.
 
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mikk

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May 15, 2012
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Next gen Intel Atom sounds to me it refers to a new architecture, although we cannot rule out higher Atom clock speeds with Raptor Lake.
 

DrMrLordX

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Apr 27, 2000
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Perhaps, but Intel weighed in the pros and cons
Are you sure? Looks more like they explored the possibility of larger dice for Alder/Raptor lake on 10ESF and found that yields tank (see: Sapphire Rapids) and that EMIB/Foveros just aren't cost effective yet for a consumer product (again, see: Sapphire Rapids).
 

eek2121

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Call me crazy, but now I wonder what will happen if there are processors with only small cores, like Alder Lake -N. Since the latter only might jump up to Octa Core, seems that the next generation might go to 16 core.

And makes me wonder...Having 16 core (no matter if is small or big) isn't overkill?
8 Gracemont cores consume around 48W of power at full load currently. Power consumption should be even lower on a small core only chip. IMO Intel is squandering the opportunity for a really neat product here. 4 'E' cores use about as much space as a 'P' core, so they could, in theory, release a chip with 40 'E' cores that would be the same size as current chips. They could possibly even do such a thing on the same socket. They could do this in the same total power limit as the 12900k. Better yet, the 'E' cores in ADL-S apparently use more power than is necessary, so the chip would likely use less power than the 12900k.

That may not sound all that impressive, however, such a chip could potentially beat 32 core Threadripper in multicore workloads, as well as the 5950x. If Intel ported the chip to Intel 4, the power/space savings there could allow for even higher performance at same power.

That is why I've long believed that Intel should focus on the *mont cores.
 

dullard

Elite Member
May 21, 2001
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4 'E' cores use about as much space as a 'P' core, so they could, in theory, release a chip with 40 'E' cores that would be the same size as current chips.
The 4 E core cluster is significantly wider than a single P core.

That extra width works out to give the 4 E core clusters roughly 1.25X the amount of area of a single P core. So, in reality, Intel could fit roughly 8 clusters of 4 E cores in the same area as the largest current chips. That is only 32 E cores, not 40.

But, your all E core idea is a good idea for certain use cases. That is why Intel is pursuing that idea with Sierra Forest with rumors of 128 E cores.
 
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dark zero

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Wait, wait, so... we are repeating the Netburst and Yonah (P6 Variant Enhanced Pentium M) scenario?
Being the P cores the Netburst one and the E cores to Yonah one?
 

nicalandia

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Jan 10, 2019
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Wait, wait, so... we are repeating the Netburst and Yonah (P6 Variant Enhanced Pentium M) scenario?
Being the P cores the Netburst one and the E cores to Yonah one?
No, in this case the E cores have less IPC when compared to P cores(30% higher IPC Clock for Clock), E cores have unmatched Performance/Area
 
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Doug S

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Intel wants 700-Series Chipset Motherboards without DDR4 | TechPowerUp

Memory makers have a few months to really ramp up DDR5 production.

The problem isn't making DDR5 chips, the problem is the shortage of PMICs for the DIMMs since DDR5 DIMMs require them and DDR4 DIMMs do not. Those PMICs are responsible for shortages all over including cars and iPads.

If there is enough new PMIC production coming online in the next few months maybe a DDR5 only strategy is feasible, if not then it will lead to less adoption of Intel's next generation.

Last fall the PMIC situation was supposed to be sorted by mid year but I have to think the war is going to change that. Not only will companies be more risk adverse and try to order bigger quantities if their contracts allow, but I read that 20% of the US Fortune 500 have some IT functions fulfilled in Ukraine. That's gonna have some impacts we haven't even begun to realize yet, just like no one expected a pandemic to cause a massive PMIC shortage. Going DDR5 only seems like an unnecessary risk that could drive more of the PC market into AMD's hands.
 
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igor_kavinski

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Used to control the flow and direction of electrical power, PMICs are manufactured using processes ranging from 180nm to 40nm. Shortages of PMICs are expected to continue through Q2/2022 or Q3/2022, according to IBS.
Is it impossible to design PMICs below 40nm?
 

dullard

Elite Member
May 21, 2001
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Is it impossible to design PMICs below 40nm?
It is possible, but the design ends up fighting itself. PMICs want as large of a trace as possible and include features measured in mm, not measured in nm.

Since these are Power Management chips, they often deal with large currents. Large currents require low resistances otherwise the chip is just a resistive heater rather than doing much of anything useful. That is heat that is inefficient: it drains batteries, overheats electronics, requires additional cooling, etc.

Resistance in a PCB trace is inversely proportional to the trace width. If you use a trace with half the width, then it doubles the resistance and doubles the amount of waste heat. Usually you use a cutting edge node to have small traces--the exact opposite of what PMICs need. So why would they use expensive modern equipment to make large traces and large features?
 
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