Question Raptor Lake - Official Thread

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Hulk

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Since we already have the first Raptor Lake leak I'm thinking it should have it's own thread.
What do we know so far?
From Anandtech's Intel Process Roadmap articles from July:

Built on Intel 7 with upgraded FinFET
10-15% PPW (performance-per-watt)
Last non-tiled consumer CPU as Meteor Lake will be tiled

I'm guessing this will be a minor update to ADL with just a few microarchitecture changes to the cores. The larger change will be the new process refinement allowing 8+16 at the top of the stack.

Will it work with current z690 motherboards? If yes then that could be a major selling point for people to move to ADL rather than wait.
 
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Carfax83

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Eh. Depending on whom you ask, Alder Lake has a rather shoddy memory controller. Raptor Lake is an opportunity for Intel to improve the situation, but . . . Rocket Lake-S also had a crappy memory controller. Do not hold your breath.

I don't recall Anandtech for Chips and Cheese stating anything negative about the memory controller. To be honest, the Alder Lake's DDR5 performance turned out to be much better than what I thought it was going to be. Before release, there were all these benchmarks going around with sky high latency scores, but the release silicon performed significantly better.

With DDR5 frequencies at 6ghz and CL36, Alder Lake begins to pull away significantly from the fastest DDR4 memory in the majority of applications. When DDR5 7ghz becomes available, I expect it will leave DDR4 in the dust when paired with Raptor or Meteor Lake and approach the 40ns latency scores that Coffee Lake had with elite DDR4.
 

JoeRambo

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I can talk about DDR4 only, but DDR5 latencies are not stellar either.
Highly tuned, same clock DDR4 ~3900-4000 same CL, similar secondaries/tertiaries is 10ns slower than Comet Lake. 10ns is like 20-30% more latency.
Stock, DDR4 3200 latency is as bad as ZEN3 that has MC on different die. Quite an achievement if you ask me.

Just because performance is great, does not mean IMC is not mobile class and hindering the chip. Only some of that extra latency can be explained by equally horrible L3 cache latency, same sized L3 is somehow 50+% slower than AMD's ( and of course slows down each LLC miss with it ). So it can be concluded that it is bad.
So no, ADL is not "okay". It is great, wide core with huge potential bolted to mobile phone worthy uncore ( mobile phone as in not including Apple chips ).
 
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mikk

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At twitter, Davidbepo has a chart with simulations of cache hierarchies and their impact on performance.

It says the cache alone will improve performance by 2-4%. So a typical tick like gain of 4-6% plus 2% clock boost and we'll end up with the 8-12% number. 15% might be a corner case scenario.

What about MT performance? And here's the point I am wondering. Whether Intel is sandbagging or not.

Let's assume Alderlake 8+8 as being 1+0.3, with 0.3 being the E cores.

Raptor Cove: 1.1

Let's say the 8 Gracemont cores need to clock down by 30%. You still end up with 1.1+0.4, or 1.5 for a MT boost of 15%. Not sure why they'll need to clock the E cores so low as it only uses 50W out of the total 250W. I think lowering P core clocks by 5% will offer them huge power budget for the extra E cores without impacting the clocks much. This assumes there's zero gain from a refined stepping, and the impact of better cache hierarchies and ring bus.

20-30% boost in MT seems pretty doable to me. Since Golden Cove is already faster than Zen 3, that is enough to be competitive with a 16 core Zen 4 in both metrics.


Maybe the 30-40% MT improvement comes from the Core i5 lineup, they go from 6+0 to 6+8 which will give these SKUs a big MT boost no doubt. There is also some perf/w improvement potential for Gracemont. If Raptor comes with a separate voltage rail for Gracemont they don't have to use the same Vcore from the faster clocked P cores.
 

dullard

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May 21, 2001
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I don't recall Anandtech for Chips and Cheese stating anything negative about the memory controller. To be honest, the Alder Lake's DDR5 performance turned out to be much better than what I thought it was going to be. Before release, there were all these benchmarks going around with sky high latency scores, but the release silicon performed significantly better.

With DDR5 frequencies at 6ghz and CL36, Alder Lake begins to pull away significantly from the fastest DDR4 memory in the majority of applications. When DDR5 7ghz becomes available, I expect it will leave DDR4 in the dust when paired with Raptor or Meteor Lake and approach the 40ns latency scores that Coffee Lake had with elite DDR4.
I don't think people ever really appreciated the benefit of independent channels on a memory module. Yes, the first piece of data has high latency. But, you can now request the second piece of data before the first one is in. And the third piece before the 2nd data is in. Etc. This has the effect of a massive latency drop for every piece of memory after the first. But of course, only the latency of the first piece of data was discussed prior to launch.

Also, if you have the money, 10 nm latency DDR5 is now available. CL2 6400:
It doesn't have the sub 8 ns of the best DDR4, but it is getting closer and closer.
 
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eek2121

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Actually MLID is usually right, he has good sources. It's one of the best leakers when it comes to Intel (not so much for AMD).
Since when has he ever been the first out the door with an accurate leak? Raptor Lake mobile is not coming this year. That is his first issue. One can guestimate that Raptor Lake S launches in Q3, that isn't a hard one.

I've never seen a "techtuber" get anything right, unless they are pulling from someone off twitter who already provided the leak prior.
 
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dullard

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Since when has he ever been the first out the door with an accurate leak? Raptor Lake mobile is not coming this year. That is his first issue. One can guestimate that Raptor Lake S launches in Q3, that isn't a hard one.

I've never seen a "techtuber" get anything right, unless they are pulling from someone off twitter who already provided the leak prior.
First to Cypress Cove on Rocket Lake:

Here were his early Alder Lake predictions (note, not all came true, the 8+0 didn't materialize):

Existence of 12 core to 64 core Threadrippers:

How many do I need to post to answer your question?
 

eek2121

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First to Cypress Cove on Rocket Lake:

Here were his early Alder Lake predictions (note, not all came true, the 8+0 didn't materialize):

Existence of 12 core to 64 core Threadrippers:

How many do I need to post to answer your question?

As many times as needed until you provide valid sources or stop claiming he is the one leaking things: https://mobile.twitter.com/search?f=live&q=intel rocket lake until:2020-05-21&src=typed_query
 

Hulk

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1. Using Cinebench R23, Golden Cove at 5GHz is 2.61 times more performance than Gracemont at 4GHz.

2. As a 12700K user 8 Golden Coves are sufficient for foreground applications. I'm rarely waiting unless it's a video render. The 16 E "background" cores of Raptor Lake would be very helpful to my work flow as they would essentially be like an additional 6 Golden Coves.

3. I doubt Raptor will increase frequency over Alder Lake. Higher ST than 5.2GHz 12900K? Higher than the coming 5.5GHz ST model? Better than 5.0GHz all-core? Any increases will be insignificant as Intel is already knocking at the wall and it's ain't budging.

4. Where are the Zen 4 leaks?
 

Carfax83

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I can talk about DDR4 only, but DDR5 latencies are not stellar either.
Highly tuned, same clock DDR4 ~3900-4000 same CL, similar secondaries/tertiaries is 10ns slower than Comet Lake. 10ns is like 20-30% more latency.
Stock, DDR4 3200 latency is as bad as ZEN3 that has MC on different die. Quite an achievement if you ask me.[

Might it have to do with the hybrid nature of the memory controller, utilizing both DDR4 and DDR5?

Honestly, DDR5 to me seems like the most exotic memory we've had on desktop PCs since Rambus's RDRAM. It seems to defy most expectations based on latency performance, because as @dullard said, it has two independent memory channels per module which allows greater memory level parallelism. I have never seen memory performance impact gaming to the degree that it has with DDR5. Case in point, one of the most CPU intensive modern games available today absolutely loves DDR5:

Riftbreaker.png




Just because performance is great, does not mean IMC is not mobile class and hindering the chip. Only some of that extra latency can be explained by equally horrible L3 cache latency, same sized L3 is somehow 50+% slower than AMD's ( and of course slows down each LLC miss with it ). So it can be concluded that it is bad.

Will increasing the L2 cache size in Raptor Cove impact the latency of the L3 cache?
 

Carfax83

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3. I doubt Raptor will increase frequency over Alder Lake. Higher ST than 5.2GHz 12900K? Higher than the coming 5.5GHz ST model? Better than 5.0GHz all-core? Any increases will be insignificant as Intel is already knocking at the wall and it's ain't budging.

Yeah I have to agree here. Whatever the increase in frequency Intel manages to glean with Raptor Lake, it will be the least impactful of the rumored 8-15% performance gain. Most of that performance will be due to cache size increase and hopefully a latency decrease for the L3 cache that @JoeRambo alluded to, as well as minor architectural tweaks which improve IPC.

Unless Zen 4 blows it out of the water (which I doubt) I will be rocking a Raptor Lake based system later this year, probably with a 13900K.
 
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Hulk

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Yeah I have to agree here. Whatever the increase in frequency Intel manages to glean with Raptor Lake, it will be the least impactful of the rumored 8-15% performance gain. Most of that performance will be due to cache size increase and hopefully a latency decrease for the L3 cache that @JoeRambo alluded to, as well as minor architectural tweaks which improve IPC.

Unless Zen 4 blows it out of the water (which I doubt) I will be rocking a Raptor Lake based system later this year, probably with a 13900K.

Yes. Raptor will rely heavily on a better tuned memory subsystem for most of the ST performance increase I think. Moving from +8 to +16 will provide the jump in MT performance, especially if they give GM a little more cache to work with.

For me Raptor Lake won't be much of a test for Intel. They already passed the architectural "test" with ADL. The real test will be after Intel 7 when they have to transition to a new node.
 

dullard

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Saylick

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So much for dreams of increased efficiency on RPL. Then again, we get more performance... so I guess that's a good thing.
Hold on now, Ian specifically says "Next-gen" Atom cores here. Raptorlake still uses Gracemont, so it can be said that they aren't next-gen. Could Ian be referring to Meteorlake? Given the new node, it doesn't seem farfetched that the Atom cores are clocked higher as well.
 
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IntelUser2000

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So much for dreams of increased efficiency on RPL. Then again, we get more performance... so I guess that's a good thing.

Next-Gen Atom, so that's Meteorlake or after. Raptorlake uses Gracemont cores.

I wonder about the logic of pushing E core frequency that high. If they can do it without pipeline increase sure. You increase frequency, then you improve architecture, then you end up with them being the new Core.

Ok I thought of another reason. If they think increasing interconnect frequency is difficult when E cores are active - then boost E core frequency. Seems like a brute force method though if true.
 

Exist50

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Hold on now, Ian specifically says "Next-gen" Atom cores here. Raptorlake still uses Gracemont, so it can be said that they aren't next-gen. Could Ian be referring to Meteorlake? Given the new node, it doesn't seem farfetched that the Atom cores are clocked higher as well.
Yeah, the new node alone could pretty much account for the boost by itself.
 

IntelUser2000

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Thinking more about it, 4.5GHz makes some sense in a desktop K scenario to take absolute performance lead.

ChipsandCheese says it doesn't make sense to push Gracemont above 3.5GHz, yet it's already exceeded in Alderlake. If they are putting 16 or more of them in Meteorlake desktop, pushing clocks for the E clocks will significantly impact MT performance.

Yes it's inefficient, but it's focusing on max performance. If the E cores are stuck at 3.9GHz it's limited in what Intel can do to target a market. 4.5GHz+ gives them flexibility in this way.

My worry is that if they need to resort to increasing pipeline stages and losing perf/clock to do so and whether such core can be efficient at 2-3GHz clock frequencies.

I've seen that Intel can be competitive in their bread and butter PC area. They need to be able to show they can go beyond that. Like a proper Tablet chip so they can organically penetrate the market, not forced as with Airmont generation.
 

DrMrLordX

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What I would have liked was half the power on the P cores, and no E cores, but twice the P cores. 16 P cores @ 4 ghz at optimal power would be AWESOME.

You are, of course, correct. 16c Golden Cove would wipe the floor with Vermeer and with enough optimizations would be . . . well I don't know if it would compete with Raphael but it would be an interesting fight. Regardless, it seems like Intel can't or won't go down that road on 10ESF. Not with "small" consumer CPUs, and by "small" I mean "nowhere near the size of a Sapphire Rapids tile".