Qualcomm demonstrates 24-core ARM server SoC

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NTMBK

Diamond Member
Nov 14, 2011
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#26
ShintaiDK said:
Memory seems to be 6 channels. Only adds to the question what all those pins are needed for.
3000 pins would be about right for 6 channels no? Given that 2011 gives you 4 channels.
 

ElFenix

Elite Member
Super Moderator
Mar 20, 2000
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#27
i wonder if big data customers with CPU needs in the 100s of thousands+ get invited to intel to give input as to what they want to see out of a server CPU? similar to how boeing (and i'm sure airbus) invites their big customers early on in the design process of an airplane?
 
Apr 22, 2012
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#28
i wonder if big data customers with CPU needs in the 100s of thousands+ get invited to intel to give input as to what they want to see out of a server CPU? similar to how boeing (and i'm sure airbus) invites their big customers early on in the design process of an airplane?
They do. Even custom SKUs are made.
 
Apr 22, 2012
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#29
3000 pins would be about right for 6 channels no? Given that 2011 gives you 4 channels.
There must be a lot more than that. Like Ethernet, I/O, Storage etc. Xeon D style I think.
 

ElFenix

Elite Member
Super Moderator
Mar 20, 2000
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#30
They do. Even custom SKUs are made.
Does the customization go beyond TDP to things like IO configuration?

I'm also thinking about something on a more basic level than that. Something at the architecture or instruction level

More like 'this is the type of data we need to process and the algorithms to do it. What can you do to help us?'
 
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#32
Intel's processor design efforts are cloistered and are not influenced by anybody but intel's executives and shareholders. The best that Apple, arguably the most powerful company on earth, could do in influencing intel's processor ambitions was to get Iris/Iris pro. Hardly the kind of low-level collaboration you see with partners such as nvidia/auto and qualcomm/android vendors.


I think it will be difficult to top intel's server efforts at 28nm. Even with all those cores, they are much weaker than haswell cores. It's great to see competition though, intel's monopoly stifles innovation. Why bother to improve your product when your clients have nowhere else to go, and you can just improve your gross margins instead?
 

NTMBK

Diamond Member
Nov 14, 2011
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#34
I think it will be difficult to top intel's server efforts at 28nm. Even with all those cores, they are much weaker than haswell cores.
It's not 28nm:

In development for more than two years, the SDP includes a custom server-class 24-core SoC built using advanced FinFet technology.
24-cores on a 14/16nm process, fed by 6 channels of DDR4, at ~140W TDP. For comparison Skylake-EP is going to be up to 28 cores, also fed by 6 channels of DDR4, and obviously also on 14nm. This should hopefully be an interesting fight, though obviously Intel has the software maturity advantage.
 
Apr 22, 2012
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#35
Does the customization go beyond TDP to things like IO configuration?

I'm also thinking about something on a more basic level than that. Something at the architecture or instruction level

More like 'this is the type of data we need to process and the algorithms to do it. What can you do to help us?'
You can get instructions too.
 
Apr 22, 2012
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#36

Nothingness

Golden Member
Jul 3, 2013
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#37
Intel's processor design efforts are cloistered and are not influenced by anybody but intel's executives and shareholders. The best that Apple, arguably the most powerful company on earth, could do in influencing intel's processor ambitions was to get Iris/Iris pro. Hardly the kind of low-level collaboration you see with partners such as nvidia/auto and qualcomm/android vendors.
My understanding is that Intel can provide different turbo speed, L3 sizes and number of cores to some customers.
 
Mar 10, 2006
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#38
i wonder if big data customers with CPU needs in the 100s of thousands+ get invited to intel to give input as to what they want to see out of a server CPU? similar to how boeing (and i'm sure airbus) invites their big customers early on in the design process of an airplane?
Absolutely. This isn't even a question :)

Even things like ISA extensions are often a product of customer requests. I have heard that Intel will even include "undocumented" instructions in its CPUs for very special (i.e. high volume) customers.
 
Apr 22, 2012
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#40
Do you have a reference for that?
http://www.theregister.co.uk/2013/05/20/intel_chip_customization/

We are definitely doing all of the above," confirmed Jason Waxman, general manager of Intel's Cloud Infrastructure Group.

"As far as the etching goes, we have done different things for different customers, and we have put different things into the silicon, such as adding instructions or pins or signals for logic for them. The difference is that it goes into all of the silicon for that product. And so the way that you do it is somebody gives you a feature, and they say, 'Hey, can you get this into the product?' You can't do something that takes up a huge amount of die, but you can do an instruction, you can do a signal, you can do a number of things that are logic-related."
 
Mar 10, 2006
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#41
It's not 28nm:



24-cores on a 14/16nm process, fed by 6 channels of DDR4, at ~140W TDP. For comparison Skylake-EP is going to be up to 28 cores, also fed by 6 channels of DDR4, and obviously also on 14nm. This should hopefully be an interesting fight, though obviously Intel has the software maturity advantage.
Purley will also launch with multi-socket support; this Qualcomm chip looks like single-socket only, though they have indicated that multi-socket support is on the roadmap.

To me it looks like Qualcomm is basically testing the waters and trying to gauge customer interest. If Qualcomm delivers on its (frankly lofty) claims of being performance/power/cost competitive with what Intel can deliver, then I suspect that the hyperscale folks will be interested.

That being said, I have to be skeptical of Qualcomm's claims here. Intel is spending ~$2b/yr just on data center specific efforts, with more if you include shared IP/tech development (CPU cores, process tech, etc.).

Qualcomm's entire R&D budget, for reference is ~$5.4b and by the time the latest round of cost cutting is done, that should be down to ~$4 billion.

Unless Qualcomm is willing to dramatically increase its spending here -- cutting heavily into near-term profitability much in the same way that Intel's mobile efforts are cutting into its own -- and is willing to keep at it for years and years, then I can't see the company being a meaningful competitor to Intel over the long-haul.
 

podspi

Golden Member
Jan 11, 2011
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#43
Thanks. Now I wonder how the customers will handle the pain of having extra instructions only supported on some chips and most likely supported by no tool except perhaps the buggy icc.
You can do just about anything, it just costs money.

Clearly for some very, very large customers it makes sense to get this sort of thing done - and they're willing to pay for it to Intel and to internal dev support.
 

Exophase

Diamond Member
Apr 19, 2012
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#44
Thanks. Now I wonder how the customers will handle the pain of having extra instructions only supported on some chips and most likely supported by no tool except perhaps the buggy icc.
I'm taking this two year old Register article with some serious salt. The "added instructions" that the Intel quote refers to may very well simply be the usual ISA extensions that wouldn't normally be present in combination with other features they want on a standard SKU. I really doubt they're allocating new chunks of the opcode space and new opcode functionality at customer request.
 

beginner99

Diamond Member
Jun 2, 2009
4,043
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#45
Intel's processor design efforts are cloistered and are not influenced by anybody but intel's executives and shareholders. The best that Apple, arguably the most powerful company on earth, could do in influencing intel's processor ambitions was to get Iris/Iris pro. Hardly the kind of low-level collaboration you see with partners such as nvidia/auto and qualcomm/android vendors.
You missed one point. Apple sells consumer hardware and such hardware has no need for very special stuff like custom instructions. Also if you want that, be prepared to pay a lot per CPU (like 5 digit and up). Obviously that won't work for consumer hardware but very well for specialized server stuff.
 

Bubbleawsome

Diamond Member
Apr 14, 2013
4,800
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#46
Also, the 24-core SKU is a prototype, they plan to have more cores.
 

Nothingness

Golden Member
Jul 3, 2013
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#47
I'm taking this two year old Register article with some serious salt. The "added instructions" that the Intel quote refers to may very well simply be the usual ISA extensions that wouldn't normally be present in combination with other features they want on a standard SKU.
My understanding is that Xeon have all features enabled as far as ISA goes (might be wrong, Intel can be so utterly stupid with ISA segmentation), and that Intel plays, as I wrote above, with frequency, cores and LLC (which also means TDP changes).

I really doubt they're allocating new chunks of the opcode space and new opcode functionality at customer request.
I doubt it too. OTOH they surely talk with higher end partners to define new ISA extensions that will be available to others. Perhaps these extensions are first available to some privileged customers, but even that is doubtful.

BTW it seems it was mentioned that the Qualcomm chip supports "several hundreds of GB" (the source is fudzilla, so pick with a grain of salt even though that certainly makes sense they would support a large amount of memory).
 
Apr 22, 2012
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#48
Also, the 24-core SKU is a prototype, they plan to have more cores.
From the looks of it, its not going to happen before 10nm. It seems to be a huge die with high TDP already on 14/16nm.
 

imported_ats

Senior member
Mar 21, 2008
422
0
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#49
3000 pins would be about right for 6 channels no? Given that 2011 gives you 4 channels.
Um, Socket 2011 supports 4x72b memory channels(~4x144=576 pins), 40 PCIe lanes (40x2x4 = 320 pins), and 3 QPI ports (3x20x2x4 = 480 pins). Or a total of roughly 1376 high speed pins, ref clocks, shielding P/G, and ancillary signals. The remaining pins are mostly dominated by general P/G pins with some ancillary low speed I/O.
 

imported_ats

Senior member
Mar 21, 2008
422
0
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#50
Does the customization go beyond TDP to things like IO configuration?

I'm also thinking about something on a more basic level than that. Something at the architecture or instruction level

More like 'this is the type of data we need to process and the algorithms to do it. What can you do to help us?'
sometime yes, sometimes no. How do you think things like PopCnt get into designs?
 


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