QLC NAND on the way...

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Glaring_Mistake

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Mar 2, 2015
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I'm guessing that would probably entail SK Hynix 14nm MLC NAND coupled to a SMI controller.

Then perhaps for competitors we would have.....

----1TB SSD using an odd number of Toshiba/WD 3D QLC dies probably with Marvell 881079 controller (this assuming SMI does not have a SATA 6 Gbps supporting 3D QLC).

----1TB SSD using an odd number of Micron 3D TLC dies (either gen 1 or gen 2) coupled to an SMI 2258 controller (or Marvell 881079)

Looks like SMI might not have one (yet) since it seems that they may not consider their earlier ECC good enough for that, quoting this article: " Both the SM2264 and SM2270 will feature Silicon Motion's third-generation LDPC encoder, now supporting 4kb codewords as part of an error correction system designed to meet the needs of QLC NAND. "
 
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cbn

Lifer
Mar 27, 2009
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Noticed something in a PDF: http://www.phison.com/edit55big5/uploadfile/Phison 20160512.pdf

Look at 2016 SSD Landscape, seems that Phison intended the S10 to be used with 3D TLC NAND.
This makes me consider that the S10 likely has support for 3D NAND or can relatively easy be made to support it but that noone has chosen to use it with 3D NAND.
To be fair though it is mostly used with Toshiba NAND which was delayed more than once and now the market doesn't look the same as it did in 2016.

It happened:

https://www.anandtech.com/show/12745/gigabyte-launches-its-first-ssds

(Very interesting considering it has BCH ECC)
 

Glaring_Mistake

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Mar 2, 2015
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It happened:

https://www.anandtech.com/show/12745/gigabyte-launches-its-first-ssds

(Very interesting considering it has BCH ECC)

I'll admit to being surprised that anyone would use the S10 with 3D TLC NAND or rather that they would use the S10 with 3D TLC NAND nowadays (if BiCS hadn't been delayed we might have seen S10 used in a few drives using 3D TLC NAND).
Do think it will work well with 3D TLC NAND too even if it uses BCH ECC instead of LDPC ECC.
 
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Billy Tallis

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Do think it will work well with 3D TLC NAND too even if it uses BCH ECC instead of LDPC ECC.

This isn't the first case of 3D NAND being used with a controller that lacks LDPC. LDPC is really more important with sub-20nm planar TLC or with QLC than it is for 3D TLC. Maxiotek's MK8115 didn't have LDPC or anything comparable, but it was primarily intended for use with 3D NAND. Endurance is better with more robust error correction, but LDPC isn't strictly necessary for a low-end SSD with decent 3D TLC.
 
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Glaring_Mistake

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This isn't the first case of 3D NAND being used with a controller that lacks LDPC. LDPC is really more important with sub-20nm planar TLC or with QLC than it is for 3D TLC. Maxiotek's MK8115 didn't have LDPC or anything comparable, but it was primarily intended for use with 3D NAND. Endurance is better with more robust error correction, but LDPC isn't strictly necessary for a low-end SSD with decent 3D TLC.

That was kind of where I was going with that - that BCH ECC is still pretty good even if LDPC is stronger.
Had forgotten about Maxiotek using BCH ECC though.
 
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Dayman1225

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Glaring_Mistake

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Seeing as in that chart they have 3D TLC NAND rated for 3000 P/E cycles at the same time as their 3D TLC NAND in their consumer drives is rated for 1500 P/E then their 3D QLC NAND in consumer drives may be rated closer to 500 P/E rather than 1000.
Guess we'll see when they actually come out on the market.


On another topic - had intended to write a long time ago about how the discussion regarding BCH/LDPC ECC reminded me of how Adata advertises LDPC ECC on some of their drives.
Quoting from their page on the SU900: "LDPC (low density parity check) error correcting code has been implemented on the SU900, leading to a massive reduction in data errors and an equal increase in data integrity. It protects your valuable contents against corruption to a much greater extent than non-ECC SSDs or even SSDs that use basic BCH error correction."
Like, I get the comparison versus drives using BCH ECC but why brag about their drives being better protected from corruption than drives using no ECC?
 
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Dayman1225

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VirtualLarry

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I'd buy a QLC 4TB SSD, for a storage drive, and replace my 4TB spinner. I think that would be a perfect application, as a data drive / game drive, and then leave the OS drive to Optane derivatives, once those pick up steam and get larger capacities (connected via NVMe, of course).

Around the time of PCI-E 5.0 and Zen 3 would be nice, and a 512GB or 1TB Optane Memory SSD, and a 4TB QLC data SSD.
 

cbn

Lifer
Mar 27, 2009
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AnandTech has found an company that is showing of their SSD controller with 4TB of Intel's QLC 64L 3DNAND

https://www.anandtech.com/show/1294...nd-a-prototype-4-tb-intel-qlc-ssd-500-cycles?

I like the following explanation, very informative (reminds me of one of Glaring_Mistake's explanations):

A side note about QLC: with more voltage levels per cell, it can be more difficult to read a cell due to voltage drift, and error correcting algorithms are in place to reduce signal bit errors caused by drift. When using cells that contain a higher number of bits, these algorithms have to work hardware to ensure data integrity, which can lead to higher power consumption or more transistors being needed in the controller. It can also have a knock on affect of reducing overall P/E cycles of the memory, which in part could be why this demo was rated at only 500 P/E right now.

With this noted, the controller is based on GF 14nm (the smallest dram-less controller I know besides this one is based on 28nm) so maybe power consumption will not be too bad. (I am also hoping this one has good firmware that allows the SSD to quickly return to low power states in bursty operation):

Maxio’s prototype drive is based on the MAS0902A-B2C DRAM-less controller as well as Intel’s N18A 3D QLC memory. The controller features two processing cores and supports a number of Maxio’s proprietary technologies, including AgileECC 2, WriteBooster 2 (SLC caching), Virtual Parity Recovery, and so on. This controller is apparently one of the smallest around, as Maxio stated that it is built on GlobalFoundries' 14nm process.

P.S. Two other Maxiotek controllers for 3D QLC NAND in this article--> https://www.tomshardware.com/news/maxio-ssd-qlc-96-layer-slc,37199.html

aHR0cDovL21lZGlhLmJlc3RvZm1pY3JvLmNvbS9VLzAvNzc3Mzg0L29yaWdpbmFsL05WTWUtMXIuanBn


aHR0cDovL21lZGlhLmJlc3RvZm1pY3JvLmNvbS9VLzEvNzc3Mzg1L29yaWdpbmFsL05WTWUtMnIuanBn


Both of these are NVMe with the top one being DRAM-less. (I am assuming they are 14nm as well)

Maxio plans to introduce two new low-cost NVMe controllers to the market before the end of 2018. The MAP0902 DRAMless and MAP0901 with a DRAM buffer both look like promising designs and feature the company's proprietary technologies. We will learn more about the new NVMe products at Flash Memory Summit in August.
 
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Glaring_Mistake

Senior member
Mar 2, 2015
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I like the following explanation, very informative (reminds me of one of Glaring_Mistake's explanations):
A side note about QLC: with more voltage levels per cell, it can be more difficult to read a cell due to voltage drift, and error correcting algorithms are in place to reduce signal bit errors caused by drift. When using cells that contain a higher number of bits, these algorithms have to work hardware to ensure data integrity, which can lead to higher power consumption or more transistors being needed in the controller. It can also have a knock on affect of reducing overall P/E cycles of the memory, which in part could be why this demo was rated at only 500 P/E right now.

Honestly, if not for the the subject matter I feel like you might have mistaken me for someone else because often when I try to explain something to someone they are just as confused after the explanation as prior to it.