Looking at the issue ports for the INT core. You know why Pilediver gonna fail like Bulldozer. Not to mention the continue of the failed concept of a shared FPU.
Also its misleading at best to show 4 pipelines/issue ports for the INT core. 2 of the are FP dispatch ports.
The entire uarch of Bulldozer/Pilediver/Steamroller/etc is based on a netburst concept. Its a speedracer. But speedracers dont work. It failed for Intel, it failed for IBM and now it failed for AMD.
problem is there is no way for it to succeed. Not to mention they lack an alternative uarch to push forward. I bet AMD is racing to produce a new uarch and they will drop this uarch as soon as its engineeringly possible.
The only question is basicly, who at AMD was/is responsible for it. I bet marketing thought more gigahurts would sell better. Their APU numbering and naming aint exactly clever either. Its desperate misleading at best. And i think its the same department responsible for both.
Comparing the issue ports: