Official AMD Ryzen Benchmarks, Reviews, Prices, and Discussion

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tamz_msc

tamz_msc

Diamond Member
Jan 5, 2017
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SPBHM said:
i5 2500K = January 2011, FX 8350 = October 2012 (newer than Ivy Bridge)

I don't understand the fascination with comparing 3.4GHz Sandy Bridge with 4GHz FX with 2x the amount of threads, specially when limiting the 2500K with slower memory (it can handle 2133 nicely), and when everyone was buying the 2500K to OC by 1GHz (if you didn't OC you would buy the non K CPU and save some money), to observe some narrow "victory"

from what I see the tests showing the FX doing better normally run with slower memory for the 2500K compared to the FX.

a more representative test for 2017 shows the stock 2500k beating even the 8370 for gaming.
https://www.youtube.com/watch?v=76-8-4qcpPo
Click to expand...
The point isn't which one overclocks better, which can run at faster RAM, etc. The point is that the low detail testing being indicative of future future performance does not hold much water. All the PCGH testing was done at stock, with the fastest officially supported memory on each of the CPUs.
 
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William Gaatjes

William Gaatjes

Lifer
May 11, 2008
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I was not sure if this is already posted :

http://wccftech.com/amds-new-ryzen-...iency/?utm_source=wccftech&utm_medium=related

pastedImage_2.png



http://support.amd.com/en-us/download/chipset?os=Windows+10+-+64



New chipset drivers that modify windows 10 scheduler and powermanagement to improve performance and efficiency of the ryzen cpu by enabling windows 10 to use senseMI.
 
William Gaatjes

William Gaatjes

Lifer
May 11, 2008
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Malogeek said:
What are you basing this on?
Click to expand...

It is in the text:
AMD has just released a new set of chipset drivers for Ryzen that promises to improve performance and power efficiency through clever Ryzen specific optimizations to Windows 10’s power management and scheduler. The new chipset driver introduces an AMD Ryzen optimized “Balanced Plan” that replaces Windows 10’s default power plan.

AMD Introduces Ryzen Optimized Windows 10 Power Plan
The new optimizations boost performance by cutting some of Windows 10’s aggressive core parking features that put lightly used cores in a sleep state and introduce added latency when those cores are woken up again to perform a task.

The update also significantly cuts the latency produced by the old Windows power plan produced by slow core transition phases from low power to a high performance state. AMD’s latest chipset drivers strips these scheduling and power state responsibilities away from the operating system and hands them to Ryzen’s internal AI network dubbed SenseMI.

SenseMI is a network of technologies built in the Ryzen hardware that enable the underlying micro-architecture to auto-regulate itself. Excecuting very fast and fine adjustments to voltage and frequency at any given millisecond to maximize performance and power efficiency. The update removes the overbearing layer of software based power management built into Windows and allows AMD’s SenseMI technology to directly manage, as it should, every Ryzen processor to run it at its peak potential.
Click to expand...

AMD’s Statement via Technical Marketing Lead Robert Hallock
Here’s some of what AMD had to say about the latest update.

Other games that we’ve seen benefit from the new plan include: Total War™: WARHAMMER, Alien: Isolation™, Crysis™ 3, Gears of War™ 4, Battlefield™ 4, Project Cars™ and more. Though not every game behaves in a way where a change in power plans has an impact on the AMD Ryzen™ processor, we’ve long maintained that there are enough games to warrant a change. Today’s findings put a fine point on that, and we’re very excited to get these changes into the hands of our customers starting today!

Installation is simple: just install the latest AMD chipset drivers for Windows 10 64-bit!

After collecting feedback from this community preview, we intend to roll the final power plan into the AMD Chipset drivers for AMD Ryzen processors. The Ryzen Balanced plan will automatically be configured as the default power plan for Ryzen-based Windows 10 PCs. If you’ve already downloaded and installed our new power plan from this blog, the new chipset driver package will ensure you do not encounter duplicate entries.

In short:

  1. The AMD Ryzen™ Balanced power plan still permits aggressive power management. There should be little difference between the OEM Balanced and the Ryzen Balanced plan. We’re interested in your feedback!
  2. Performance of the AMD Ryzen™ Balanced power plan should be on par with the High Performance plan. We’re interested in your feedback on this, too.
  3. Finally, if you see a third-party tool reporting “idle” clocks in the range of 3200-3400MHz, you can be virtually certain that the core is actually sleeping and the tool is simply reporting the last known P-State.
Click to expand...
 
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Despoiler

Despoiler

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Nov 10, 2007
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The write up is incorrect. The new power plan doesn't change the scheduler. It changes the core parking behavior. They are separate functions in windows.
 
William Gaatjes

William Gaatjes

Lifer
May 11, 2008
22,547
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Malogeek said:
Wasn't there nothing wrong with the scheduler according to AMD?
Click to expand...

Nothing wrong with the scheduler.
  • "We have investigated reports alleging incorrect thread scheduling on the AMD Ryzen™ processor. Based on our findings, AMD believes that the Windows® 10 thread scheduler is operating properly for “Zen,” and we do not presently believe there is an issue with the scheduler adversely utilizing the logical and physical configurations of the architecture."

  • "Finally, we have reviewed the limited available evidence concerning performance deltas between Windows® 7 and Windows® 10 on the AMD Ryzen™ CPU. We do not believe there is an issue with scheduling differences between the two versions of Windows. Any differences in performance can be more likely attributed to software architecture differences between these OSes."
  • "Finally, we have investigated reports of instances where SMT is producing reduced performance in a handful of games. Based on our characterization of game workloads, it is our expectation that gaming applications should generally see a neutral/positive benefit from SMT. We see this neutral/positive behavior in a wide range of titles, including: Arma® 3, Battlefield™ 1, Mafia™ III, Watch Dogs™ 2, Sid Meier’s Civilization® VI, For Honor™, Hitman™, Mirror’s Edge™ Catalyst and The Division™. Independent 3rd-party analyses have corroborated these findings.

    For the remaining outliers, AMD again sees multiple opportunities within the codebases of specific applications to improve how this software addresses the “Zen” architecture. We have already identified some simple changes that can improve a game’s understanding of the "Zen" core/cache topology, and we intend to provide a status update to the community when they are ready."
Click to expand...

Here is the full story :
https://www.pcper.com/reviews/Processors/AMD-Ryzen-and-Windows-10-Scheduler-No-Silver-Bullet




Despoiler said:
The write up is incorrect. The new power plan doesn't change the scheduler. It changes the core parking behavior. They are separate functions in windows.
Click to expand...

Yeah, i could remember you guys debating about the duty distribution between the scheduler and the separate power manager of windows 10 in the technical thread of Ryzen. And the impact it has on Ryzen performance.
But i was not sure anymore what the outcome was.
 
CatMerc

CatMerc

Golden Member
Jul 16, 2016
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I believe Looncraz had several reproducable non-optimal behaviors he found.
 
A

Ajay

Lifer
Jan 8, 2001
16,094
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WinNT 3.1 was released in 1993 and has been in continual development for over 25 years. The scheduler, like many other subsystems in NT (now Win10/Server 2016) has been updated mainly by bolting on new functionality. That functionality resides in different modules within the Kernel. This results in at least two problems: 1) MS doesn't like changing behavior unless it really needs - since the regression testing is probably a PITA and odds are good that it will break some user mode applications. 2) The observed tendency to 'bolt' on new functionality rather than rewriting parts of the scheduler for more predictable and efficient behavior. If someone is curious, then can contrast MS development with Linux development. There are plenty of resources on the web for the interested reader.

IMHO, Windows is due for a re-write, but that is a HUGE undertaking - who know when and if that will actually happen.

TL;DR - scheduling behavior under modern Windows isn't deterministic and MS has no intention of tuning it for any particular ISV or IHV.
 
U

Udgnim

Diamond Member
Apr 16, 2008
3,681
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Mockingbird said:
What do you mean?
Click to expand...

Ryzen has 2 blocks of CPU cores

so using 1700 as an example, Block A consists of CPU 0-3 and Block B consists of CPU 4-7

Block A & Block B communicate with each other across the Infinity Fabric (AMD term), but doing so is slower than communicating within the block itself

so on very simple terms, Ryzen optimization would be keeping CPU thread work within the same block as much as possible and avoid moving CPU thread work between blocks as much as possible.
 
Mockingbird

Mockingbird

Senior member
Feb 12, 2017
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Udgnim said:
Ryzen has 2 blocks of CPU cores

so using 1700 as an example, Block A consists of CPU 0-3 and Block B consists of CPU 4-7

Block A & Block B communicate with each other across the Infinity Fabric (AMD term), but doing so is slower than communicating within the block itself

so on very simple terms, Ryzen optimization would be keeping CPU thread work within the same block as much as possible and avoid moving CPU thread work between blocks as much as possible.
Click to expand...

I don't see a problem.

Code: 
Logical to Physical Processor Map:
**--------------  Physical Processor 0 (Hyperthreaded)
--**------------  Physical Processor 1 (Hyperthreaded)
----**----------  Physical Processor 2 (Hyperthreaded)
------**--------  Physical Processor 3 (Hyperthreaded)
--------**------  Physical Processor 4 (Hyperthreaded)
----------**----  Physical Processor 5 (Hyperthreaded)
------------**--  Physical Processor 6 (Hyperthreaded)
--------------**  Physical Processor 7 (Hyperthreaded)

Logical Processor to Socket Map:
****************  Socket 0

Logical Processor to NUMA Node Map:
****************  NUMA Node 0

No NUMA nodes.

Logical Processor to Cache Map:
**--------------  Data Cache          0, Level 1,   32 KB, Assoc   8, LineSize  64
**--------------  Instruction Cache   0, Level 1,   64 KB, Assoc   4, LineSize  64
**--------------  Unified Cache       0, Level 2,  512 KB, Assoc   8, LineSize  64
********--------  Unified Cache       1, Level 3,    8 MB, Assoc  16, LineSize  64
--**------------  Data Cache          1, Level 1,   32 KB, Assoc   8, LineSize  64
--**------------  Instruction Cache   1, Level 1,   64 KB, Assoc   4, LineSize  64
--**------------  Unified Cache       2, Level 2,  512 KB, Assoc   8, LineSize  64
----**----------  Data Cache          2, Level 1,   32 KB, Assoc   8, LineSize  64
----**----------  Instruction Cache   2, Level 1,   64 KB, Assoc   4, LineSize  64
----**----------  Unified Cache       3, Level 2,  512 KB, Assoc   8, LineSize  64
------**--------  Data Cache          3, Level 1,   32 KB, Assoc   8, LineSize  64
------**--------  Instruction Cache   3, Level 1,   64 KB, Assoc   4, LineSize  64
------**--------  Unified Cache       4, Level 2,  512 KB, Assoc   8, LineSize  64
--------**------  Data Cache          4, Level 1,   32 KB, Assoc   8, LineSize  64
--------**------  Instruction Cache   4, Level 1,   64 KB, Assoc   4, LineSize  64
--------**------  Unified Cache       5, Level 2,  512 KB, Assoc   8, LineSize  64
--------********  Unified Cache       6, Level 3,    8 MB, Assoc  16, LineSize  64
----------**----  Data Cache          5, Level 1,   32 KB, Assoc   8, LineSize  64
----------**----  Instruction Cache   5, Level 1,   64 KB, Assoc   4, LineSize  64
----------**----  Unified Cache       7, Level 2,  512 KB, Assoc   8, LineSize  64
------------**--  Data Cache          6, Level 1,   32 KB, Assoc   8, LineSize  64
------------**--  Instruction Cache   6, Level 1,   64 KB, Assoc   4, LineSize  64
------------**--  Unified Cache       8, Level 2,  512 KB, Assoc   8, LineSize  64
--------------**  Data Cache          7, Level 1,   32 KB, Assoc   8, LineSize  64
--------------**  Instruction Cache   7, Level 1,   64 KB, Assoc   4, LineSize  64
--------------**  Unified Cache       9, Level 2,  512 KB, Assoc   8, LineSize  64
 
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Crumpet

Crumpet

Senior member
Jan 15, 2017
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The Alienware R3 platform intrigues me.. Are we going to see some ridiculous Dell Laptop with 12 cores?

Also, I thought Alienware had an Intel contract... intriguing
 
T1beriu

T1beriu

Member
Mar 3, 2017
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The Alienware R3 platform has a "D" in the codename that points to a desktop platform. More info about the codes in the source link.
 
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Crumpet

Crumpet

Senior member
Jan 15, 2017
745
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T1beriu said:
The Alienware R3 platform has a "D" in the codename that points to a desktop platform. More info about the codes in the source link.
Click to expand...

Makes sense, even so, has Dell changed contracts to AMD? That would be huge news surely.
 
T

tential

Diamond Member
May 13, 2008
7,348
642
121
Mockingbird said:
I don't see a problem.

Code: 
Logical to Physical Processor Map:
**--------------  Physical Processor 0 (Hyperthreaded)
--**------------  Physical Processor 1 (Hyperthreaded)
----**----------  Physical Processor 2 (Hyperthreaded)
------**--------  Physical Processor 3 (Hyperthreaded)
--------**------  Physical Processor 4 (Hyperthreaded)
----------**----  Physical Processor 5 (Hyperthreaded)
------------**--  Physical Processor 6 (Hyperthreaded)
--------------**  Physical Processor 7 (Hyperthreaded)

Logical Processor to Socket Map:
****************  Socket 0

Logical Processor to NUMA Node Map:
****************  NUMA Node 0

No NUMA nodes.

Logical Processor to Cache Map:
**--------------  Data Cache          0, Level 1,   32 KB, Assoc   8, LineSize  64
**--------------  Instruction Cache   0, Level 1,   64 KB, Assoc   4, LineSize  64
**--------------  Unified Cache       0, Level 2,  512 KB, Assoc   8, LineSize  64
********--------  Unified Cache       1, Level 3,    8 MB, Assoc  16, LineSize  64
--**------------  Data Cache          1, Level 1,   32 KB, Assoc   8, LineSize  64
--**------------  Instruction Cache   1, Level 1,   64 KB, Assoc   4, LineSize  64
--**------------  Unified Cache       2, Level 2,  512 KB, Assoc   8, LineSize  64
----**----------  Data Cache          2, Level 1,   32 KB, Assoc   8, LineSize  64
----**----------  Instruction Cache   2, Level 1,   64 KB, Assoc   4, LineSize  64
----**----------  Unified Cache       3, Level 2,  512 KB, Assoc   8, LineSize  64
------**--------  Data Cache          3, Level 1,   32 KB, Assoc   8, LineSize  64
------**--------  Instruction Cache   3, Level 1,   64 KB, Assoc   4, LineSize  64
------**--------  Unified Cache       4, Level 2,  512 KB, Assoc   8, LineSize  64
--------**------  Data Cache          4, Level 1,   32 KB, Assoc   8, LineSize  64
--------**------  Instruction Cache   4, Level 1,   64 KB, Assoc   4, LineSize  64
--------**------  Unified Cache       5, Level 2,  512 KB, Assoc   8, LineSize  64
--------********  Unified Cache       6, Level 3,    8 MB, Assoc  16, LineSize  64
----------**----  Data Cache          5, Level 1,   32 KB, Assoc   8, LineSize  64
----------**----  Instruction Cache   5, Level 1,   64 KB, Assoc   4, LineSize  64
----------**----  Unified Cache       7, Level 2,  512 KB, Assoc   8, LineSize  64
------------**--  Data Cache          6, Level 1,   32 KB, Assoc   8, LineSize  64
------------**--  Instruction Cache   6, Level 1,   64 KB, Assoc   4, LineSize  64
------------**--  Unified Cache       8, Level 2,  512 KB, Assoc   8, LineSize  64
--------------**  Data Cache          7, Level 1,   32 KB, Assoc   8, LineSize  64
--------------**  Instruction Cache   7, Level 1,   64 KB, Assoc   4, LineSize  64
--------------**  Unified Cache       9, Level 2,  512 KB, Assoc   8, LineSize  64
Click to expand...
That thing you don't see a problem with is one of the main reasons I struggle with getting a cpu like this.
 
mohit9206

mohit9206

Golden Member
Jul 2, 2013
1,381
511
136
Did you guys watch the latest Adoredtv video on toms hardware bias regarding their best cpu of the month article?
The bias is really strong with toms hardware.
 
Crumpet

Crumpet

Senior member
Jan 15, 2017
745
539
96
mohit9206 said:
Did you guys watch the latest Adoredtv video on toms hardware bias regarding their best cpu of the month article?
The bias is really strong with toms hardware.
Click to expand...

Yeah he tried REALLY HARD to not call them out for it, but you could tell at times during the video that he just couldn't understand their decisions.
 
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