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Nvidia's Future GTX 580 Graphics Card Gets Pictured (Rumours)

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AtenRa said:
No way,
TMUs are too large to double them.
Click to expand...

Maybe not double, could be just an increase. Remember G80 (8800GTX) to G92 (9088GTX)? Hmm. Not the best example as that was a die shrink. Ok, how about GF100 to GF104. Essentially doubled the TMU's per SB.
 
AtenRa said:
I mean they doubled the TMUs but at the same time they halved the Rasters and Polymorphs to save space. If we double TMUs in the GF100 the die size will sky rocket.
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The only way you could be arguing these points, is if you knew EXACTLY the die space each TMU, Rasters, and Polymorphs takes up. Is this right or wrong?
If you don't know this information, this argument cannot exist. If you had this information, I.E. exact space (mm2) each component takes up, then we have a ball game. Until then though, this argument is dead in it's tracks. You can take guesses all you want, but that won't make it so.
 
AtenRa said:
I mean they doubled the TMUs but at the same time they halved the Rasters and Polymorphs to save space. If we double TMUs in the GF100 the die size will sky rocket.
Click to expand...

Overall though, the transistor count and die size is just under 2/3rds with 3/4 the number of shaders, so they did more space saving than reflects the ratio of shaders between the two chips.
It's not like they increased TMU:Shader ratio, reduced other things and ended up with a 3/4 shader, 3/4 transistor part. They increased TMUs, reduced other things, and ended up with a proportionally smaller die.
 
Keysplayr said:
The only way you could be arguing these points, is if you knew EXACTLY the die space each TMU, Rasters, and Polymorphs takes up. Is this right or wrong?
If you don't know this information, this argument cannot exist. If you had this information, I.E. exact space (mm2) each component takes up, then we have a ball game. Until then though, this argument is dead in it's tracks. You can take guesses all you want, but that won't make it so.
Click to expand...

Didn't the GF100 had a lot of features on it that were HPC based rather than gaming whihc took up die size? I think Jen hsung talked about this at GTC 2010 conference about the fermi design on why so big and hot etc.
 
In order to understand the physical size of the TMUs have a look at the pics below.

First chip is GT200. One TPC comprised of 3 SMs (Streaming Processors)(24 Cores) and 8 TMUs. You can clearly see that the TMUs take half the size of the TPC and the rest half is taken by the SMs.

Take a look at the GF100 and in particular the SMs. Each SM has 4 TMUs half of GT200 but 32 Cores vs 24 in GT200. 2/3 of the SM size in GF100 is occupied by the 32 Cuda Cores and 1/3 is the 4 TMUs. If we double the TMUs the SM will rise in size by 25% and because we have 16 SMs in GF100 that they occupy almost 2/3 (66%) of the entire chip, die size will rise to ~600mm2.

GF100 = 530mm2

66% = ~350mm2

350mm2 + 25% = 437mm2 (437-350 = 87)

530 + 87 = 617mm2

For a bigger picture open the link bellow
http://pc.watch.impress.co.jp/img/pcw/docs/359/423/04.jpg

1024.jpg



GT200
http://ixbtlabs.com/articles3/video/gt200-part1-p2.html
1024.jpg
 
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Keysplayr said:
The only way you could be arguing these points, is if you knew EXACTLY the die space each TMU, Rasters, and Polymorphs takes up. Is this right or wrong?
If you don't know this information, this argument cannot exist. If you had this information, I.E. exact space (mm2) each component takes up, then we have a ball game. Until then though, this argument is dead in it's tracks. You can take guesses all you want, but that won't make it so.
Click to expand...
How can that be? Are you harping on him for using common sense? Am I missing something? If you take Fermi, which is already a huge die, and double the number of TMU's, you are adding even more to an already huge die. It stands to reason that since the Fermi die is already bordering on supermassive, that they wouldn't do this without reductions on other aspects of the architecture. Like they did before. Why do you have such a problem with him stating this?
 
uclaLabrat said:
How can that be? Are you harping on him for using common sense? Am I missing something? If you take Fermi, which is already a huge die, and double the number of TMU's, you are adding even more to an already huge die. It stands to reason that since the Fermi die is already bordering on supermassive, that they wouldn't do this without reductions on other aspects of the architecture. Like they did before. Why do you have such a problem with him stating this?
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Yes, I have "a" problem with him, and you, stating this. I don't have "such" a problem where it makes me lose my appetite or go on a drinking binge. I hope you can appreciate the difference and not get lost in the text.

You don't know the size a single TMU takes up. You can't know the increase in die space for something doubled if you didn't know the size before it was doubled. You can't know how much die space a Polymorph engine takes up once it's halved if you didn't know the dies space it took up before.

My point, as if it wasn't clear enough, is that the argument of die space for particular components, e.g. polymorph engines, raster units, TMU's is totally and completely moot when you don't know the data. Data being the actual size (die space in mm2) each uses. Not even close. Therefore, no valid argument can be made about how much a doubling and/or reduction of any component, let alone a combination of components are changed (doubled or reduced).

I seriously do not think I can explain this any better.

If you have "duh", and you double it, how much "duh" do you have?
Well, what is "duh"? How many transistors does it have? How many mm2 does each "duh" take up? If you don't know the answers to the last three questions, than you can't answer the first question.
 
Uclalabrate, Atenra You guys have done pretty darn good here. Very good logic and have presented your arguments extremely well . This is a pretty good Topic
 
Keysplayr said:
Yes, I have "a" problem with him, and you, stating this. I don't have "such" a problem where it makes me lose my appetite or go on a drinking binge. I hope you can appreciate the difference and not get lost in the text.

You don't know the size a single TMU takes up. You can't know the increase in die space for something doubled if you didn't know the size before it was doubled. You can't know how much die space a Polymorph engine takes up once it's halved if you didn't know the dies space it took up before.

My point, as if it wasn't clear enough, is that the argument of die space for particular components, e.g. polymorph engines, raster units, TMU's is totally and completely moot when you don't know the data. Data being the actual size (die space in mm2) each uses. Not even close. Therefore, no valid argument can be made about how much a doubling and/or reduction of any component, let alone a combination of components are changed (doubled or reduced).

I seriously do not think I can explain this any better.

If you have "duh", and you double it, how much "duh" do you have?
Well, what is "duh"? How many transistors does it have? How many mm2 does each "duh" take up? If you don't know the answers to the last three questions, than you can't answer the first question.
Click to expand...
Your point is perfectly clear. It's also the extreme end of the argument. To be sure, we can't know anything about the die size unless we have the actual dimensions of each architectural feature. However, as I said before, it stands to reason that since these chips are all built on the same process node, and are in fact in the same family, the relative size of each unit will remain the same. This is not an amazing leap of logic. And it stands to reason, as I said before, that if you doubled the TMU's, without restricting anything else, you would end up with a large increase in die size.

That fact that you're harping on semantics and jumping up his ass for an extremely reasonable and logically thought out speculation is at the least amusing to me, and bordering on nitpicking. Sure, we don't ABSOLUTELY know, but all signs point to yes. Maybe they have some tweaks in there that will let them eat their cake and have it too, like AMD did with Barts, but who knows? If you're trying to eliminate speculation on this board, you're fighting a losing battle.
 
uclaLabrat said:
Your point is perfectly clear. It's also the extreme end of the argument. To be sure, we can't know anything about the die size unless we have the actual dimensions of each architectural feature. However, as I said before, it stands to reason that since these chips are all built on the same process node, and are in fact in the same family, the relative size of each unit will remain the same. This is not an amazing leap of logic. And it stands to reason, as I said before, that if you doubled the TMU's, without restricting anything else, you would end up with a large increase in die size.

That fact that you're harping on semantics and jumping up his ass for an extremely reasonable and logically thought out speculation is at the least amusing to me, and bordering on nitpicking. Sure, we don't ABSOLUTELY know, but all signs point to yes. Maybe they have some tweaks in there that will let them eat their cake and have it too, like AMD did with Barts, but who knows? If you're trying to eliminate speculation on this board, you're fighting a losing battle.
Click to expand...

1st Bold above ^
Which is ???

2nd Bold above^
What does "don't ABSOLUTELY know mean? That you half know? Know a little bit?
I can safely say without any uncertainly or the smallest shadow of a doubt, that you have ABSOLUTELY "NO" idea. That, is the only absolute here.

And I'd appreciate it if you would stop reading my posts and picturing me in your mind screaming the words and thinking to yourself that I'm all worked up. I assure you I am quite calm, not harping, and certainly not up someone's ass. Get of this kick please. Discuss til your hearts content, but don't worry about me personally.
 
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