nVidia GT300's Fermi architecture unveiled: 512 cores, up to 6GB GDDR5

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alyarb

Platinum Member
Jan 25, 2009
2,425
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76
Originally posted by: Idontcare
Originally posted by: alyarb
scrolling down to the bottom you see that the 5870 is the quietest idle card in the objective 1-meter test.

I know this isn't the thread to talk about it, but just briefly since we have wandered here anyways does this mean the batmobile fan shroud is actually function over form? Meaning despite all the tongue-in-cheek ridicule the design itself is actually a superior one? That would be some nice vindication for the AMD reference design engineers.


the static pressure on that fan at idle has to be so low that the batmobile induction can't be there for that reason. but when you consider the modern trend in performance PC cases like the NZXT panzerbox, where the hard drive cage is totally lifted out of the way of the front intake fan to make room for the absurd length of these cards, you pretty much have the batmobile induction within 6 inches of the front intake. you can only surmise that the trapezoidal induction creates a cleaner pressure well that is lined up with existing air currents in the case that 4870-style completely-closed off design from previous generations do not. the 4870 fan must pull in air perpendicularly from underneath the card and i would imagine most of the angular momentum of the fan they chose is wasted when used like this (could be why so many aftermarket coolers scrapped the "exhaust" method and went back to traditional blow-down coolers). with the 4870 you have to pull the air up from underneath, bring all its k momentum to a stop, twirl it around and then send it out the back of the machine, completely stopping it and changing its direction. and where is this k component coming from if you are running a tightly-fitted mGPU config?

with the batmobile you have a somewhat laminar flow going on across the entire length of the card, further augmented by the probable case intake fan. it's never going to be investigated but i would imagine this is a good reason for the rear intakes, on top of the appealing look. the 2D consumption is so low that the card could probably run passively in a good case. the induction has to be there for peak dissipation.

Most 8800 GTX coolers did not feature this open rear and had only the 4870 style intake while the 8800 Ultra did feature it, although rather obstructed.

The GTX 280 was the first to feature the molded rear induction, and you can see why:
http://2.bp.blogspot.com/_vesw...400/01-3SLI-GTX280.jpg


heh, damn. look what they did to the 5850. the ductwork is completely non-functional here:
http://dl.getdropbox.com/u/594924/in.PNG

can't be that important.
 

BFG10K

Lifer
Aug 14, 2000
22,709
3,002
126
Originally posted by: BenSkywalker

You realize you just linked Fudzilla who quoted "Magical fairies that pull numbers out of their rectum"? There is zero credibility in your link, well, the date may be accurate, but I wouldn't bet money on it.
Nice attack on the messenger, but no dice. The Fudzilla link simply reports the PCGA?s Horizon revenue report, and I even edited it because I thought you?d do exactly what you did (I guess you must?ve missed the edit).

Here?s the amended link again:

http://www.pcgamingalliance.or...ad.asp?ContentID=15911

In case you miss it again, that goes to www.pcgamingalliance.org and is the whitepaper summary PDF of their Horizon report. Please don?t bring Fudzilla into this because they?re not relevant.

My first three quotes in my previous post were all from that whitepaper and back my claims.

It's important to keep in mind, however, that this NPD data concerns retail data only and does not include sales of digitally downloaded games, micro-transactions, online subscriptions, etc. The NPD Group recently started paying more attention to online revenue with its quarterly subscription tracker, but this data does not include that.
Thanks for proving my point for me, namely that digital transactions aren?t included in your figures.

It?s quite obvious that if PCGA?s figures are higher than yours, they must be including transactions that yours aren?t. Unless you think PCGA are liars.

There?s no need for me to respond to the rest of your figures given they likely misrepresent the PC gaming revenue in the same way.
 

scooterlibby

Senior member
Feb 28, 2009
752
0
0
Originally posted by: Idontcare
Originally posted by: scooterlibby
I know it's overkill, but I would be kind of tempted by either Hemlock or the dual Fermi. I'd pretty much be set until 2012, assuming they still make PC games by then ;)

I'm not a "supercharged" gamer like many of you guys, but I am curious what people think about the noise (see graph at bottom) aspects of the high-end graphics products.

Do you guys water-cool them to get around the noise issue, or is the noise really a non-issue? (just because the chart goes to 67dB doesn't mean it is an issue, I have no reference point to judge how loud 67dB is really)

Ha I have to admit, I have all the fans in the Antec 1200 and the Zalamn 9700 turned up to full speed and when I game I turn the 260's up to 100%. There is no doubt that it's extremely loud, but there are several factors that make it a non-issue for me:

1. When I'm gaming I wear headphones and I can't hear the noise
2. When I'm not gaming and using the PC I have just gotten used to the white noise. I actually kind of like it.
3. I always put the PC to sleep when I'm not using it.
4. Possibly I have played in/attended too many shows and can't hear very well.

The loudest by far is the 260's at 100%. I find those results you linked to be quite interesting, because I always figured a single card would make less noise, even if it was dual chip. Guess I was wrong looking at the 295.
 

BFG10K

Lifer
Aug 14, 2000
22,709
3,002
126
Originally posted by: dguy6789

I thought it was common knowledge that their $100 and lower cards sold orders of magnitude higher numbers than their flagship cards. It's not even close. Their flagship cards are more marketing tools than anything else.
The marketing part is simply untrue. High-end discrete parts make far more profit per unit than low-end parts, so they still pull in serious cash despite not shifting as many units.
 

s44

Diamond Member
Oct 13, 2006
9,427
16
81
Originally posted by: Shaq
And you have to leave MMO's with the rest of the revenue if you're comparing consoles and PC's since it is a PC game. And with Star Wars coming out be prepared to add another billion to that number.
I bet you'll be able to run Star Wars: The Old Republic on a 7600GT.

Again, even if MMOs get even bigger they won't much expand the high-end GPU space.
 

Extrem1st

Junior Member
Sep 13, 2009
24
0
0
Originally posted by: thilanliyan
Yeah it's harder to guess what performance will be with this new architecture...unlike 5870 where we could sort of guess it would be 2x4870/4890.

5870 is not 2x 4870/4890, maybe 1.4~5x at best
 

Nemesis 1

Lifer
Dec 30, 2006
11,366
2
0
Originally posted by: tviceman
Wow, it sounds like Nvidia is literally aiming to kill Larabee before it ever enters production. No doubt they'll retake the single gpu performance crown back from ATI, but I also have no doubt these cards will be expensive. I imagine we'll be seeing leaked benchmarks before the end of october.

You could be right who knows .

I do have a question tho . Maybe IDC can way in on this .

3billion transitors sounds cool really neat also the biggest chip ever made by NV bigger than the 55 nm monster.

What was the transitor count on the 285. and this chip is suppose to be 3 billion transiters. Thats hugh . The step to 40nm is only a half node . Not a full node.

Intels 45nm is smaller than TSMC 40nm. 3 billion transitors on the 40nm this I have to see. I think its BS but maybe not . If its true we won't see this chip until hell freezes over. FACT! I believe the GTX 285 had 1.4 billion transitors.

IDC do the math tell them about this massive die size over 700mm. Going from 55nm to half node 40nm . Only gains about 30% more die space . Yet NV more than doubled the transitor at 40nm . This I have to see.


 

HurleyBird

Platinum Member
Apr 22, 2003
2,800
1,528
136
Originally posted by: Nemesis 1Intels 45nm is smaller than TSMC 40nm. 3 billion transitors on the 40nm this I have to see. I think its BS but maybe not . If its true we won't see this chip until hell freezes over. FACT!

The difference is that GPUs usually have much higher transistor densities than CPUs, which is one of the reasons they run at slower clock speeds. RV870 is ~2.15B transistors, so 3B doesn't sound too far out there for a chip in the 400-500mm2 range.

 

Nemesis 1

Lifer
Dec 30, 2006
11,366
2
0
Originally posted by: HurleyBird
Originally posted by: Nemesis 1Intels 45nm is smaller than TSMC 40nm. 3 billion transitors on the 40nm this I have to see. I think its BS but maybe not . If its true we won't see this chip until hell freezes over. FACT!

The difference is that GPUs usually have much higher transistor densities than CPUs, which is one of the reasons they run at slower clock speeds. RV870 is ~2.15B transistors, so 3B doesn't sound too far out there for a chip in the 400-500mm2 range.

True but apples to apples OK . The 4870 was a small chip at 55nm. Its bigger now At 40nm. ATI almost doubled the transitor count in the 5870. Its a bigger die .

NV more than doubled there transitor count. and the 55nm was hugh . If the 3 billion is trueth the 40nm will be way bigger than the GTX285 way bigger .

 

Nemesis 1

Lifer
Dec 30, 2006
11,366
2
0
From 65 nm to 55nm NV 285 went from 576 t0 470 mm die . Thats only 100mm smaller .

going to 40nm from 55nm would at most bring that die size down to about 325mm die size

more than double that transitor count by 2 1/4 the smallest this die will be is 625mm.
 

Kuzi

Senior member
Sep 16, 2007
572
0
0
Originally posted by: Nemesis 1
Originally posted by: tviceman
Wow, it sounds like Nvidia is literally aiming to kill Larabee before it ever enters production. No doubt they'll retake the single gpu performance crown back from ATI, but I also have no doubt these cards will be expensive. I imagine we'll be seeing leaked benchmarks before the end of october.

What was the transitor count on the 285. and this chip is suppose to be 3 billion transiters. Thats hugh . The step to 40nm is only a half node . Not a full node.

Intels 45nm is smaller than TSMC 40nm. 3 billion transitors on the 40nm this I have to see. I think its BS but maybe not . If its true we won't see this chip until hell freezes over. FACT! I believe the GTX 285 had 1.4 billion transitors.

IDC do the math tell them about this massive die size over 700mm. Going from 55nm to half node 40nm . Only gains about 30% more die space . Yet NV more than doubled the transitor at 40nm . This I have to see.

A worst case scenario can put Fermi's size at ~650mm, but I'm sure nV would not go that big. You have to keep in mind that Fermi is a new architecture, and nV may have figured a way to cram more transistors/features while keeping the size acceptable. My guess is Fermi will be between 550-580mm, but we'll have to wait and see.
 

Cookie Monster

Diamond Member
May 7, 2005
5,161
32
86
I thought it was going to be weigh in at 460mm^2? (based on the 40nm transistor density/count of Cypress)
 

Kuzi

Senior member
Sep 16, 2007
572
0
0
Originally posted by: Cookie Monster
I thought it was going to be weigh in at 460mm^2? (based on the 40nm transistor density/count of Cypress)

You see, nV and ATI architectures are not directly comparable. If we look at the GT200b and RV770, both were made at 55nm, and the GT200b had about 45% more transistors (1.4 billion vs. 965 million), but was 80% larger in die size than the RV770 (470mm vs. 260mm). So it would be more accurate to base any die size speculation of Fermi on past nVidia architectures not on ATI's.

I think IDC would be able to give a better guess about the size of Fermi.
 

lopri

Elite Member
Jul 27, 2002
13,310
687
126
That is actually an interesting observation.

RV770 (TSMC 55nm) | ~1.0 B | 256 mm²
RV870 (TSMC 40nm) | 2.1 B | 334 mm²

GT200b (TSMC 55nm) | 1.5 B | ~500 mm²
GT300 (TSMC 40nm) | 3.0 B | ??? mm²

If we simply apply TSMC's 40nm numbers per RV870, then;

(RV870/40nm) 2.1B @334 mm² => (GT300/40nm) 3.0 B @477 mm²

If we go by the gains made from previous generation (again by AMD) and apply that to GT300, then;

RV770/55nm to RV870/40nm : x2 transistor counts, x1.3 size

GT200b/55nm to GT300/40nm : x2 transistor counts, x1.3 size = 650 mm²
 

MODEL3

Senior member
Jul 22, 2009
528
0
0
With this logic:

GTX280 = 1400 million transistors 576mm2 at 65nm

GTX285 = 1400 million transistors 470mm2 at 55nm

4870 = 956 million transistors 260mm2 at 55nm
http://www.anandtech.com/video/showdoc.aspx?i=3405

5870 = 2,15 billion transistors 334mm2 at 40nm
http://www.anandtech.com/video/showdoc.aspx?i=3643&p=1

5870 has 2,249X (2,15/0,956) more transistors than 4870.

Let's suppose GTX380 has also 2,249X more transistors than GTX285.
So GTX380 = 3,15 billion transistors (instead of 3 million...) (1400*2,249)

With 2,249X scaling for transistor number, the 5870 (40nm) was only 1,284X bigger (die size) in relation with 4870 (55nm) (334mm2/260mm2).

So the hypothetical GTX380 (40nm) with 3,15 billion transistors will have also 1,284X scalling regarding die size.

So GTX380 (3,15 billion transistors) will be 603mm2. (470mm2*1,284)

So the real GTX380 with 3 billion transistors (with the logic that you are using) is going to be less than 603mm2.

In the best case scenario will be 603mm2/3,15*3=575mm2.

But the logic thing is to be a little more than 575mm2, because the scaling in transistors (3-> 3.15) doesn't bring exact scaling in die density (example: 2,249 vs 1,284) (let's say bellow 591mm2)

The thing is that in 5870-4870 case the memory controller is the same 256bit, while in the GTX380-GTX285 case the new memory controller has smaller width than the old one. (GTX380=384bit, GTX285=512bit)

So you have to deduct a little bit die space from the new design (GTX380).

I guess (based on this logic) a good estimation is 576mm2 (same as GTX280)

The thing is that with a new architecture, new process technology and with the way that NV calculates the transistors (does the old numbers include cache transistors? does in this case the 3billion figure include cache transistors?) it is too difficult to say what the die size will be.

 

Cogman

Lifer
Sep 19, 2000
10,284
138
106
A GPU supports C++ natively?
Ferni architecture natively supports C [CUDA], C++, DirectCompute, DirectX 11, Fortran, OpenCL, OpenGL 3.1 and OpenGL 3.2. Now, you've read that correctly - Ferni comes with a support for native execution of C++. For the first time in history, a GPU can run C++ code with no major issues or performance penalties and when you add Fortran or C to that, it is easy to see that GPGPU-wise, nVidia did a huge job.

Seriously? For one, CUDA is not C, and for another "native execution of c++" Please, don't make me laugh. NOTHING supports native execution of c++ code.

At most, what they have developed is a c/c++ compiler that is able to translate c++ code into nVidia architecture code. And given how different c is from CUDA, I wouldn't be surprised if the nVidia version of c++ is pretty messed up (It almost has to be)
 

Keysplayr

Elite Member
Jan 16, 2003
21,211
50
91
Originally posted by: Cogman
A GPU supports C++ natively?
Ferni architecture natively supports C [CUDA], C++, DirectCompute, DirectX 11, Fortran, OpenCL, OpenGL 3.1 and OpenGL 3.2. Now, you've read that correctly - Ferni comes with a support for native execution of C++. For the first time in history, a GPU can run C++ code with no major issues or performance penalties and when you add Fortran or C to that, it is easy to see that GPGPU-wise, nVidia did a huge job.

Seriously? For one, CUDA is not C, and for another "native execution of c++" Please, don't make me laugh. NOTHING supports native execution of c++ code.

At most, what they have developed is a c/c++ compiler that is able to translate c++ code into nVidia architecture code. And given how different c is from CUDA, I wouldn't be surprised if the nVidia version of c++ is pretty messed up (It almost has to be)

How do you know? It's one thing to "call" shens. It's another to "prove" it.
We're all ears. Please keep in mind that this is a new architecture that we've really only touched on. It's not G80. It's not G92 and it's not GT200.
 

LCD123

Member
Sep 29, 2009
90
0
0
Isn't the GTX 295 already faster than the radeon 5870? Nvidia would basically be competing with themselves, no one will want the GTX 295 then. ATI should have gone 384 bit ram, they are bandwith limited and they can't even outperform the GTX 295 that came out before. That's why ATI is losing money, they have to price their cards cheaper than Nvidia. Their cards are great, just not the fastest.
 

dguy6789

Diamond Member
Dec 9, 2002
8,558
3
76
Originally posted by: LCD123
Isn't the GTX 295 already faster than the radeon 5870? Nvidia would basically be competing with themselves, no one will want the GTX 295 then. ATI should have gone 384 bit ram, they are bandwith limited and they can't even outperform the GTX 295 that came out before. That's why ATI is losing money, they have to price their cards cheaper than Nvidia. Their cards are great, just not the fastest.

The HD 5870 and the GTX 295 are not in the same price category. The GTX 295 is 5-10% faster than the 5870(sometimes slower) and is more than $100 more expensive. For the price, Nvidia has nothing to compete with the 5870 as is. The Radeon HD 5870X2 is ATI's flagship, not the 5870. The 5870 is not even ATI's 2nd best card this generation, that will be the 5850X2. Even considering that, I doubt anyone even if they had unlimited money would buy a GTX 295 over the HD 5870. The performance between the two is very close, but the feature set difference is huge(In favor of the HD 5870).
 

Cogman

Lifer
Sep 19, 2000
10,284
138
106
Originally posted by: Keysplayr
Originally posted by: Cogman
A GPU supports C++ natively?
Ferni architecture natively supports C [CUDA], C++, DirectCompute, DirectX 11, Fortran, OpenCL, OpenGL 3.1 and OpenGL 3.2. Now, you've read that correctly - Ferni comes with a support for native execution of C++. For the first time in history, a GPU can run C++ code with no major issues or performance penalties and when you add Fortran or C to that, it is easy to see that GPGPU-wise, nVidia did a huge job.

Seriously? For one, CUDA is not C, and for another "native execution of c++" Please, don't make me laugh. NOTHING supports native execution of c++ code.

At most, what they have developed is a c/c++ compiler that is able to translate c++ code into nVidia architecture code. And given how different c is from CUDA, I wouldn't be surprised if the nVidia version of c++ is pretty messed up (It almost has to be)

How do you know? It's one thing to "call" shens. It's another to "prove" it.
We're all ears. Please keep in mind that this is a new architecture that we've really only touched on. It's not G80. It's not G92 and it's not GT200.

Name one piece of hardware that "Nativity" runs C++. In order for it to do that, every card would essentially need a c++ compiler built into the circuitry. That is a whole lot of gates and large power draws for a piece of technology that changes at a fairly steady pace (IE they would be locking in a compiler into hardware, no updates).

This wouldn't be a small piece of hardware either, it would be a significant chunk. And for what benefit? So people can pipe code to be compiled by the video card to the video card?

But you want real proof? It is in the text "Ferni architecture natively supports C [CUDA]..." nVidia architecture do not now, nor have they ever natively supported C. Nvidia HAS distributed a compile for their architecture that just so happens to read a C like language. Cuda code still has to be compiled which means the Video card doesn't natively support it.

Theoretically, because you can compile c like code, you could then go ahead and write just about any other language for the nvidia architecture.
 

LCD123

Member
Sep 29, 2009
90
0
0
I agree, the 5870 has dx11 and more features and im sure people could overlook the 10% slower performance. Even at the same price, I bet it would be a tought choice between the two. Take 10% more performance or take futureproof and extra features? As for ATI having two cards in xfire, compare that vs. Nvidia SLI please.
 

Idontcare

Elite Member
Oct 10, 1999
21,110
59
91
Originally posted by: Nemesis 1
From 65 nm to 55nm NV 285 went from 576 t0 470 mm die . Thats only 100mm smaller .

going to 40nm from 55nm would at most bring that die size down to about 325mm die size

more than double that transitor count by 2 1/4 the smallest this die will be is 625mm.

Originally posted by: Kuzi
Originally posted by: Cookie Monster
I thought it was going to be weigh in at 460mm^2? (based on the 40nm transistor density/count of Cypress)

You see, nV and ATI architectures are not directly comparable. If we look at the GT200b and RV770, both were made at 55nm, and the GT200b had about 45% more transistors (1.4 billion vs. 965 million), but was 80% larger in die size than the RV770 (470mm vs. 260mm). So it would be more accurate to base any die size speculation of Fermi on past nVidia architectures not on ATI's.

Guys, Kuzi is right on this one.

xtor density correlates to architecture, as well as the R&D investments made to optimize that architecture for things other than diespace, such as yields/clockspeeds/latencies/intro-timeline/etc.

Using xtor density from one IC as a basis for extrapolation to the diesize of another entirely unrelated (architecturally) IC is valid in providing nothing more than a reasonable lower-estimate of the other chip's size.

Anand using Cypress xtor density to extrapolate Fermi's size is a valid approximation, but it only provides a valid lower-limit estimate, and we should treat it as nothing more than that.

Likewise we can't using data regarding Nvidia's prior architectures to extrapolate a chip size for Fermi. The one data point you can reliable use there is prior maximum diesize as that speaks to the design-house's engineer's competence and capability (factors that no-doubt went into setting the diesize budget for Fermi long ago) as well as its project-manager's risk tolerance and aggressiveness (also factors that no doubt played a role throughout Fermi's development).

So we know from Anand's analysis that Fermi could be as small 460mm^2 (could be smaller still, but we have justification to use 460mm^2 based on available data) and we know from Nvidia's past experience that anything up to 576mm^2 would not have been outside their means (could be larger still, but we have justification to use 576mm^2 based on available data).

Originally posted by: lopri
If we go by the gains made from previous generation (again by AMD) and apply that to GT300, then;

RV770/55nm to RV870/40nm : x2 transistor counts, x1.3 size

GT200b/55nm to GT300/40nm : x2 transistor counts, x1.3 size = 650 mm²

For example Lopri's post would be awesome if Fermi architecture is an extension of GT200 architecture, but its not so that actually makes the whole comparison not helpful as the analysis is critically flawed (dreadful way to state it but that is the lingo of the trade, hope it doesn't offend you Lopri). It is a great example of how to go about doing the comparisons though, just Fermi being Fermi ruins it is all.

Originally posted by: MODEL3
5870 has 2,249X (2,15/0,956) more transistors than 4870.

Model3 I don't know if many of the forum readers will understand that in some parts of the world a decimal comma is used to denote a decimal separator (aka decimal place) in the same way a decimal point does.

I only mention this because your post may fall on deaf ears for some who are thinking your numbers are whack because, for example, a USA high-school student is going to read your quote above and assume you are trying to say a 5870 has two thousand two hundred and forty nine times more xtors than a 4870. Many of us know what you mean and we do the comma/point conversions in our head just as you translate the English language in yours, but many won't, so just FYI in case it matters to you.

edit: forgot to add my 2-bits:
Originally posted by: Kuzi
I think IDC would be able to give a better guess about the size of Fermi.

530mm^2, my guess. Is it better? Not at all, but I'd say anything between 460mm^2 and 576mm^2 is fair-game and equally probably until we know more specifics regarding the design tradeoff choices that Fermi project managers had to make (budgetary, timeline, etc).

Ironically the method of logical deduction employed here by us folks is called Fermi estimation.
 

Idontcare

Elite Member
Oct 10, 1999
21,110
59
91
Originally posted by: Cogman
Originally posted by: Keysplayr
Originally posted by: Cogman
A GPU supports C++ natively?
Ferni architecture natively supports C [CUDA], C++, DirectCompute, DirectX 11, Fortran, OpenCL, OpenGL 3.1 and OpenGL 3.2. Now, you've read that correctly - Ferni comes with a support for native execution of C++. For the first time in history, a GPU can run C++ code with no major issues or performance penalties and when you add Fortran or C to that, it is easy to see that GPGPU-wise, nVidia did a huge job.

Seriously? For one, CUDA is not C, and for another "native execution of c++" Please, don't make me laugh. NOTHING supports native execution of c++ code.

At most, what they have developed is a c/c++ compiler that is able to translate c++ code into nVidia architecture code. And given how different c is from CUDA, I wouldn't be surprised if the nVidia version of c++ is pretty messed up (It almost has to be)

How do you know? It's one thing to "call" shens. It's another to "prove" it.
We're all ears. Please keep in mind that this is a new architecture that we've really only touched on. It's not G80. It's not G92 and it's not GT200.

Name one piece of hardware that "Nativity" runs C++. In order for it to do that, every card would essentially need a c++ compiler built into the circuitry. That is a whole lot of gates and large power draws for a piece of technology that changes at a fairly steady pace (IE they would be locking in a compiler into hardware, no updates).

This wouldn't be a small piece of hardware either, it would be a significant chunk. And for what benefit? So people can pipe code to be compiled by the video card to the video card?

But you want real proof? It is in the text "Ferni architecture natively supports C [CUDA]..." nVidia architecture do not now, nor have they ever natively supported C. Nvidia HAS distributed a compile for their architecture that just so happens to read a C like language. Cuda code still has to be compiled which means the Video card doesn't natively support it.

Theoretically, because you can compile c like code, you could then go ahead and write just about any other language for the nvidia architecture.

Guys, quibbling over a semantics gaffe in such an onerous fashion is beneath you both, please.

A Quick Refresher on CUDA

CUDA is the hardware and software architecture that enables NVIDIA GPUs to execute programs written with C, C++, Fortran, OpenCL, DirectCompute, and other languages.

http://redirectingat.com/?id=5...itectureWhitepaper.pdf

Yes the lingo "native C++" is intended to be restricted to characterization of the compiler and not meant to be descriptive of the attributes of the underlying hardware.

At the same time it is clear that Keys misstated this but it is also clear what he meant/intended to communicate (C++ code can be compiled to run on Fermi)...Cogman I know you are intelligent enough to see what he meant and understanding enough to give some room for the possibility of a person simply accidentally conflating the technical terms.

What is important here? That Fermi can support the execution of C++ compiled code or that some dude mistakenly equates the native aspects of the this feature to that of the hardware? I program in C++ and I run programs that are compiled from Fortran (I have the source and I compile for my own unique hardware combos), personally I am quite excited about the prospects of getting my hands on a Fermi compiler. Could be super fun. Getting all excitable over semantics gaffes, not so much.