Nehalem

[xxceler8]

Hmm.. I'm getting a stong urge to stop waiting.. and buy

can I get a w00t?

 

[palladium]

hmm didn't find any mention about Quickpath that was supposed to replace the FSB....

 

[CTho9305]

Originally posted by: Nemesis 1
I was also told the number of pipelines of Nehalem . Its more than Penryn but a little less than P4C. I will keep this one to myself as it gives me an edge in the forum wars.

You think making unsubstantiated claims (which you will presumably do based on whatever you read) gives you an "edge"? I think it'd make you look like a jerk/troll... to each his own, I guess.

 

[dmens]

Originally posted by: CTho9305

Originally posted by: Nemesis 1
I was also told the number of pipelines of Nehalem . Its more than Penryn but a little less than P4C. I will keep this one to myself as it gives me an edge in the forum wars.

You think making unsubstantiated claims (which you will presumably do based on whatever you read) gives you an "edge"? I think it'd make you look like a jerk/troll... to each his own, I guess.

seriously. besides how exactly does knowing the "pipestage number" give you an "edge"?

btw, feel free to pm me the "pipestage number", i want to see how close you are

 

[JAG87]

Originally posted by: dmens

Originally posted by: CTho9305

Originally posted by: Nemesis 1
I was also told the number of pipelines of Nehalem . Its more than Penryn but a little less than P4C. I will keep this one to myself as it gives me an edge in the forum wars.

You think making unsubstantiated claims (which you will presumably do based on whatever you read) gives you an "edge"? I think it'd make you look like a jerk/troll... to each his own, I guess.

seriously. besides how exactly does knowing the "pipestage number" give you an "edge"?

btw, feel free to pm me the "pipestage number", i want to see how close you are

lmao. why he hasn't been banned yet I'll never know.

 

[Nemesis 1]

dmens I wouldn't normaly do this . But your 1 of 3 posters I would always try to accommadate. Because threw the years I have read your post and their very good and cccurate.

18 pipes demens. I couldn't just PM you. So here it is . Whats the advantage of knowing pipelines. O/C s and stock speeds. Up till 2 weeks ago . It was always 20 pipelines. So I was excited about Nehalem Because My favorite Cpu of all times was the P4C 20 pipelines. But source said its confirmed by him its not 20 but 18.


JAG87 I am sorry about the Skulltrail thread. But I was right and you were wrong no big deal. I haven't done anything Jag87 that would warrant a vacation .

I am hard on AMD its true. But if you would please go back read threads befor C2D . The Guys were really hard on Intel . None can say it isn't so . I am also hard on the LEFT .

But that's what forums are for, reasonable debate or information gathering. Or trouble shooting.

When I debate someone I don't get mad and start throwing insults at people if they are presenting their facts and winning the debate . Being wrong about things is a part of life . You learn from it and move on .

Jag87 I have never ever declared myself one of the top hardware guru's at a site . Which insults every member of that forum. I don't know any of you people in person . So there is know way I can know qualifacations of another poster.

Lets take demens for instance great poster and pretty good info to boot. But I know nothing about his qualifacation or his occupation. But I can go by past post.

If you can show me a hardware thread were I was way off on what I said please do so.

Let see off the top of my head.

I said way befor any penryn info was known that Intels 45nm. would be highK/ metal gates'

I said Intel would introduce 1600fsb(another forum) on penryn . I said skulltrail would do sli and o/c like crazy.

I said that AMDs stock was going south of $8a share. I said K-10 would be 10% slower than kents,/ I was wrong on this one. Broken I was right . with the bios fix its 20% slower

Now for 11/2 years I watched as AMDERS hyped K10 beyond belief. Now go back and read those threads . Maybe some vacations should be handed out to these for passing really bad info . Being off 50% on performance is kinda alot.

I only have the use of the right side of my body . Do I seem bitter about it. Dam straight i don't . S-hit happens. I had a great job nursing but thats all gone now . Broken back .

So now I am an info nut and a forum H-ore. I sleep 2 hours a day max. I still think life is great. But I wouldn't mind one bit . Falling a sleep and not waking up. Besides there is someone I would love to meet.

I fairly old and have had a great life and family . Who will be provided for no matter what .

Its hard to try and walk in another mans shoes. But till you do . One never truely knows that person.

 

[dmens]

Originally posted by: Nemesis 1
18 pipes demens.

it isn't 18 or 20.

Whats the advantage of knowing pipelines. O/C s and stock speeds. Up till 2 weeks ago . It was always 20 pipelines. So I was excited about Nehalem Because My favorite Cpu of all times was the P4C 20 pipelines. But source said its confirmed by him its not 20 but 18.

maybe at the 50000 foot view. there are so many other factors with more weight on frequency. imho you cannot make any kind of estimate on release speeds based on that one metric, especially when zero information has been released on the internal arch. wait until realwordtech does an article (they are usually pretty detailed).

 

[JAG87]

Originally posted by: Nemesis 1
JAG87 I am sorry about the Skulltrail thread. But I was right and you were wrong no big deal. I haven't done anything Jag87 that would warrant a vacation .

I am hard on AMD its true. But if you would please go back read threads befor C2D . The Guys were really hard on Intel . None can say it isn't so . I am also hard on the LEFT .

But that's what forums are for, reasonable debate or information gathering. Or trouble shooting.

When I debate someone I don't get mad and start throwing insults at people if they are presenting their facts and winning the debate . Being wrong about things is a part of life . You learn from it and move on .

Jag87 I have never ever declared myself one of the top hardware guru's at a site . Which insults every member of that forum. I don't know any of you people in person . So there is know way I can know qualifacations of another poster.

debating with you comes nothing even close to reason. you take intel to heart, just look at the threads you started in the cpu section, skulltrail this, nehalem that, AMD is falling apart, bla bla bla

its always the same song with you, intel intel intel. thats all I hear coming out of your mouth. if you have intel stocks and are giving them free publicity then just say so, it wouldn't be so bad if you admitted it, I would let it go.

but alas I fear you are a much worse specimen, either someone working directly, or even worse being paid for viral marketing. if you are none of the above, then just label yourself as "fanboy" so that at least people know who they are dealing with.

 

[IntelUser2000]

Turbo Mode is for Mobile only, just like Core 2 Duo Merom and Penryn.

 

[Nemesis 1]

Turbo mode as far as I knew was said to be lappies only . Inorder to conserve power in single threaded apps. who knows.

demens I told ya what I was told. You seem to have inside track. You work for Intel.

If its not 18 pipes how many is it . If its 16 only . Penryn will do me till gesher. If its 22 or more . I will wait for Gesher. If intel drops the ball . I can forgive the prescot failer. But If the same team that screwed up pressies screws up Nehalem . Than that will be the end of intel for me . I will just keep the penryn till they box me up.



Jag87 I am not AEG type . I don't work for intel . I no longer work . I invest and draw my pension and SS. I am however a hugh Intel fan . Until the next major screw up that is.

Jag87 you must have recieved permission to resort to your old style of posting . Nothing but insults.

 

[JAG87]

don't confuse my style of posting with my style of replying to you.

and its nice that for once you at least admit to being a huge intel fan, something you did not want to acknowledge in the skulltrail thread.

good luck to you, and don't get too attached to something because in this field things change fast, and tomorrow AMD or another company could come up with something better. just play it cool, and buy what's best.

 

[Extelleron]

Originally posted by: Nemesis 1
Turbo mode as far as I knew was said to be lappies only . Inorder to conserve power in single threaded apps. who knows.

demens I told ya what I was told. You seem to have inside track. You work for Intel.

If its not 18 pipes how many is it . If its 16 only . Penryn will do me till gesher. If its 22 or more . I will wait for Gesher. If intel drops the ball . I can forgive the prescot failer. But If the same team that screwed up pressies screws up Nehalem . Than that will be the end of intel for me . I will just keep the penryn till they box me up.



Jag87 I am not AEG type . I don't work for intel . I no longer work . I invest and draw my pension and SS. I am however a hugh Intel fan . Until the next major screw up that is.

Jag87 you must have recieved permission to resort to your old style of posting . Nothing but insults.

Why do you think that a deeper pipeline will be better? More pipes means higher-clockspeed but also lower IPC and more heat/power consumption for the same performance (most of the time). That's not to say that an increase in pipeline depth is bad, it can have its place. C2D has a 14-stage pipeline while A64 has a 12-stage pipeline yet C2D is significantly faster in terms of IPC and scales better in clockspeed at the same time.

A pipeline with more stages is not necessarily good or bad. It depends on the architecture. I don't understand why you wouldn't buy Nehalem if it has a 16-stage pipeline but you would if it had an 18-stage pipeline.

 

[note235]

so a variant will be 8 cores?
waiting for that for some rendering

 

[Idontcare]

Originally posted by: note235
so a variant will be 8 cores?
waiting for that for some rendering

And at 2 threads per core that would be 16 threads per socket. Sweet.

 

[Nemesis 1]

That was a lot nicer reply Jeg87. It would be nice tho if you would just reply like I was just another poster. Its nice to get special attention . But I don't think its right in front of the other children .

Extelleron . I really like the Northwoods. I really believe that 20 pipelines would be great today with c2d logic improvements and the memory bandwidth that will be available the improvements in compilers crosses fingers.The new logic improvements if any. An improvements in H/T. I don't believe there will ever be stalls. I always that when I was on air that 130nm northwood ran cool on stock cooling . With the improvemant intel has made to the transitor itself along with further improvements. I believe this might be the sweet spot. What would shock me is if intel could get 22pipes to slap penryn around and improve in all areas. At the same Clock. Because I believe 20 pipes would really take advantage of the new transitors . Allow wild ghz.

I have read in here/ or other forum recently that X86 as far as performance improvements is at its end and that further IPC improvements are about as good as its going to get. Intel may find some performance in those pipes.


Jeg87 The reason I like intel is because they have the resources. I have watched what Intel does with its money. I like how they handle it . Constantly pushing the limits in order to gain higher profits. They spend the money on fabs and research thats required. This is what makes them a market leader. As long as they run their company the way they are . I will be a fan. Because I just believe because of their power and how they ron the company they can lose a battle but the war is theirs.
Some say Intel has played Dirty locking AMD out of markets. The courts will decide that.

But I will tell ya right straight out . I thought When AMD reversed engineered Intels chip and how they got X86 was as Dirty as i ever seen . So I really think that company was and always will be What K10 turned out to be at release. K8 was good.

Plus the Fact that IBM tried to monopolize the PC industry while they put Dec out of business. I really like Chip tech . Dec was the best. I see it has a possiable and probably the only hope we have of getting out of this mess without boom and gloom.
IBM and AMD are all chummy so I dislike them both even more tho that could be hard.

 

[CTho9305]

I thought When AMD reversed engineered Intels chip and how they got X86 was as Dirty as i ever seen .

1. This was back in the 8088 through 386 days.
2. AMD was an official second-source supplier: allowed, by Intel, to manufacture Intel's design. IBM didn't trust any single supplier to not screw up, and would only buy Intel's chips if there was a backup manufacturer in place.
3. Intel turned around and tried to screw AMD with some shenanigans. Despite the second-source agreements, Intel tried to stop AMD from making their CPUs while also trying to keep AMD from designing its own chip.
4. Those shenanigans were in violation of the contract (read: illegal), and Intel's punishment was having to grant AMD a license to important IP.

From here (emphasis mine):
In his opinion, Judge Phelps quotes numerous Intel documents which he said reveal a pattern of deception in its dealings with AMD. The intent, he writes, was to withhold the 386 from AMD and pressure it to renegotiate the second-source deal while at the same time stalling AMD from coming out with a competing microprocessor of its own. One memo, dated September, 1985, notes "I think our strategy should be, first and foremost, to keep the negotiations going. This will give us an opportunity to establish the 386 in the market and, hopefully, delay and AMD discussion with our other competitors." A few months later, another memo states "Our strategy is to keep talking, but unless we get desperate, we license nothing else. AMD is a long-shot back-up in case of emergency. We do not want them to go on to Hitachi or NEC, and should not stimulate them to do so."
...
He thus granted AMD "a permanent, royalty-free, non-exclusive, non-transferrable, worldwide right...under any and all Intel copyrights, patents, trade secrets and maskwork rights contained in the current versions of AMD's reverse-engineered 80386 family of microprocessors...."

As far as I can tell, only one side was doing something wrong, and it wasn't AMD. I guess you could say AMD did get x86 due to dirty behavior: Intel's dirty behavior.

If I misunderstood something, corrections are appreciated. I didn't follow this closely at the time because I was worrying about other things (mainly elementary school). I can't think of anybody I know who was at AMD at the time either.

Some say Intel has played Dirty locking AMD out of markets. The courts will decide that.

Did you not follow the stories in the EU, Korea, and Japan? It's not just recently that Intel has gotten in trouble either: 1998.

 

[lopri]

(off-topic)

I've just been through the craziest time in my life (not necessarily in a bad way) for the past 4~5 months and couldn't really spare time for the geek in me as well for enjoying my time here @AT. Things are finally getting a little less dense (my personal life, that is) and I was thrilled to get back to the forums but at the same time I was worried that forums might have died down due to lack of competition in the industry in recent times.. And I'm happy to find that my concern was of no base. It's good to see the familiar names and lively discussions. Keep it up, folks. I love AT!

 

[BrownTown]

Nemesis 1, you are completely ignorant as to what you are talking about here. For one thing the numbers you are talking about are the LENGTH of the pipelines not the number of pipelines, more pipeline stages makes a CPU have a LOWER IPC, the number of stages in the pipeline is a trade off between clockspeed (high number of pipeline stages) and lower power, and high IPC (less pipeline stages). So far Intel has yet to release the number of pipeline stages to the public, so unless you have some insight into Intel's design staff then there is no way you could possibly know, also the fact that people who DO have such insight contradict you is pretty damning to your argument. Not to mention the fact that you mentioned that the number changed 2 weeks ago which is pretty silly since the number of pipeline stages is something that would have been determined years ago not 2 weeks ago. Also just BTW the funniest part to me is when you said your favorite CPU the P4C had 20 pipeline stages which BTW is wrong, it had 21.

 

[Nemesis 1]

Ya I guess I should have said it like this . Northwood has 20pipeline stages.

I have read both 20& 21 pipeline stages for P4C

Pipeline Architecture

The pipeline architecture is very important in relation to the speed of a CPU, this pipeline architecture is the amount of stages to execute an extension or anything relevant.
The Northwood core has a 20 stage pipeline architecture vs. the Prescott?s 31 stages.
The longer the number of stages the higher the possible clock speed of the processor but the less efficient it is as it takes much longer to execute what is needed. The less number of stages that you have the lower the clock speed but there more efficient the CPU is. The main disadvantage however with a longer pipeline is that the IPC count is lower (Instructions Per Clock Cycle), this is why it is best to have a middle length pipeline so you can have acceptable clock speeds, a decent IPC count and a improved overall efficiency.

Northwood was just a little faster than Pressies . North had 20 pipeline stages vs. 31 for pressies . So with 11 more stages the pressies were very close in IPC . I am sure going from 14 on C2D to 20 on Nehalem isn't going to break the bank. This should allow for monster freq.

Dothan has fewer pipeline stages than c2d yet c2ds has better IPC.

Amd has fewer pipeline stages than c2D yet C2D has better IPC.

Please Explain why what your saying isn't proving to be true in the real world.

 

[dmens]

more pipeline stages makes a CPU have a LOWER IPC

not at all, the two metrics are not related.

the number of stages in the pipeline is a trade off between clockspeed (high number of pipeline stages) and lower power, and high IPC (less pipeline stages)

not really since again highly pipelined designs does not equate to lower processing width. that is highly dependent on the design.

 

[CTho9305]

Dothan has fewer pipeline stages than c2d yet c2ds has better IPC.

Amd has fewer pipeline stages than c2D yet C2D has better IPC.

Please Explain why what your saying isn't proving to be true in the real world.

Real architecture is pretty complicated. You can't compare pipeline length or "number of pipelines" directly between architectures because there are so many other factors involved. For example, you really can't compare AMD issue width and Intel issue width (see my explanation here for a short explanation of that part). Even between Pentium Pro derivatives, it's not straightforward.

[*]Improved branch prediction might improve IPC without affecting the length of the pipeline.
[*]Support for reordering of memory operations can also have significant performance impact: an architecture that does no reordering of loads or stores relative to each other will be slower than one that lets loads bypass earlier loads, which will be slower than one that lets loads bypass earlier stores. The pipeline length would not necessarily be affected.
[*]Execution unit changes can have a significant effect. For example, properly-optimized SSE code can run 2x as fast on Barcelona/Phenom than on K8 because the SSE datapaths were widened to 128 bits (from 64 previously). Other changes might include switching to a different algorithm for division (i.e. Penryn).

Basically it boils down to this: issue width and pipeline length aren't enough to figure out much about the performance.

 

[Nemesis 1]

Thank for your speedy respose. You said it pretty dam good. So if intel makes improvements on Nehalem in the areas you pointed over Nehalem . In theory Intel could lengthen the stages to achieve higher freq. and still have = Ipc to penrtn at the same clock speed is this correct?

 

[IntelUser2000]

Northwood was just a little faster than Pressies . North had 20 pipeline stages vs. 31 for pressies . So with 11 more stages the pressies were very close in IPC . I am sure going from 14 on C2D to 20 on Nehalem isn't going to break the bank. This should allow for monster freq.

Not only Prescott needed significant architecture improvements JUST to equal Northwood, it also consumed stupendous amount of power. Anyway, they are not gonna do that. 14 to 20 is nearly 50%, 20 to 31 is 55%. It's pretty similar increase in terms of pipelines.

It also says on PCWatch(Japanese computer site) that it was told from Intel's top engineers that Nehalem doesn't change much in terms of pipelines, and will remain similar or equal to the current Core microarchitecture derivatives.

They are now also saying that the single threaded performance improvement will be 10-25%. Pentium 4 architecture and its derivatives were the worst desktop CPUs ever, including the Northwood(it was just a better piece of crap, but still a piece of crap). It could have been much better if they didn't go with the Netburst in the first place with its extreme clock speed focus. They wouldn't have been able to put the Northwood based cores as mobile anyway. Just as soon as Intel came up with the Netburst architecture, their power consumption went from 30W to 70-80W.

10-25% performance improvement is quite a lot actually. People got spoiled with the introduction of the Core 2 CPUs. Remember how miserable the improvements were for most of the years dating back to the Pentium III. In fact, Athlon 64 were the only CPU to bring significant performance benefits with a new architecture during that time. If they keep true to the 10-25% performance increase, this is actually what Yonah-->Conroe did per clock.

 

[Nemesis 1]

Originally posted by: BrownTown
Nemesis 1, you are completely ignorant as to what you are talking about here. For one thing the numbers you are talking about are the LENGTH of the pipelines not the number of pipelines, more pipeline stages makes a CPU have a LOWER IPC, the number of stages in the pipeline is a trade off between clockspeed (high number of pipeline stages) and lower power, and high IPC (less pipeline stages). So far Intel has yet to release the number of pipeline stages to the public, so unless you have some insight into Intel's design staff then there is no way you could possibly know, also the fact that people who DO have such insight contradict you is pretty damning to your argument. Not to mention the fact that you mentioned that the number changed 2 weeks ago which is pretty silly since the number of pipeline stages is something that would have been determined years ago not 2 weeks ago. Also just BTW the funniest part to me is when you said your favorite CPU the P4C had 20 pipeline stages which BTW is wrong, it had 21.

Ya demens did come right out and say . Nehalem wasn't 18or 20 pipeline stages.
I haven't seen were he has been wrong yet, So demens does work for intel.

Poncho another Intel employee argued with me till he was blue in the face over Skulltrail having sli capabilities. and penryn 1600FSB on the desktop. X38=x48 chipset.

Demens just tell us how many pipeline stages there are. 16/22

 

[Nemesis 1]

I tell ya what lets try and get Anand to do review of p4c vs. AMD64 using 2threads and see which cpu performs the best. I can't help that coders wouldn't mult-thread because they felt it wasn't needed for they just weren't qualified. Same applies to aMD 64 its not AMDs fault the coders won't go to 64bit instructions.

You can say what you want about the pressies . But P4C was a great processor and it ran cool.

I agree that the pressies sucked . But the verdict is still out on the worse core ever. Right now K10 is a strong contender for the honors.