Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[CouncilorIrissa]

While the 6.5 GHz seems far-fetched personally to me, certain clock speed boost is certainly in order thanks to Fin- and Nanoflex.
You don't really need to go further than to see what mobile SoC manufacturers achieved with it.
Let's recap:

Node / Core family	Qualcomm Oryon	Arm performance core	Apple
N4/N5	Oryon Gen 1: 3.4 GHz (mainstream SKU), 4.0-4.2 (unobtanium)	X4: 3.39 (8 Gen 3)	Everest: 3.49 GHz (M2)
N3P	Oryon Gen 3: 5.0 GHz, 4.74(?) in phones	4.21 (X930, a massively bigger core)	M4-P core: 4.51 GHz (again, while going from 8 to 10 wide design), N3E

 

[adroc_thurston]

While the 6.5 GHz seems far-fetched personally to me, certain clock speed boost is certainly in order thanks to Fin- and Nanoflex.
You don't really need to go further than to see what mobile SoC manufacturers achieved with it.
Let's recap:

Node / Core family	Qualcomm Oryon	Arm performance core	Apple
N4/N5	Oryon Gen 1: 3.4 GHz (mainstream SKU), 4.0-4.2 (unobtanium)	X4: 3.39 (8 Gen 3)	Everest: 3.49 GHz (M2)
N3P	Oryon Gen 3: 5.0 GHz, 4.74(?) in phones	4.21 (X930, a massively bigger core)	M4-P core: 4.51 GHz (again, while going from 8 to 10 wide design), N3E

They were hiking the voltage in a way AMD can't.
But yes, a double-double shrink is just that.

In any case, 6.5 is just a 14% freq bump.

 

[CouncilorIrissa]

They were hiking the voltage in a way AMD can't.
But yes, a double-double shrink is just that.

Well yeah, but a 8-10% clock boost sounds reasonable to me personally.

 

[adroc_thurston]

Well yeah, but a 8-10% clock boost sounds reasonable to me personally.

Higher, it's a double-double wham.
Zen4 did 12% with a single shrink.

 

[CouncilorIrissa]

Higher, it's a double-double wham.
Zen4 did 12% with a single shrink.

N7 -> N5 is a bigger shrink than N4P -> N3 / N3->N2 individually, though.

 

[adroc_thurston]

N7 -> N5 is a bigger shrink than N4P -> N3 / N3->N2 individually, though.

Perf-wise? nope, especially not with Nanoflex.

 

[511]

Fmax is something I expect to be at 6.5 GHz but QCOM is doing 5 GHz at 18W lol LNL does that at 15-16W on worse node.

 

[adroc_thurston]

but QCOM is doing 5 GHz at 18W lol LNL does that at 15-16W on worse node.

Pegasus is a far, far more capable core and only 2.3mm^2.

 

[511]

Pegasus is a far, far more capable core and only 2.3mm^2.

That is true but have to see Cougar Cove on 18A to pass final judgement for LNC and why do I feel like Darkmont will match LNC.

 

[adroc_thurston]

and why do I feel like Darkmont will match LNC.

bad news my friend bad news

 

[DZero]

Been saying it. China is coming. Its only a matter of time.

But didn't expected a mass fabrication of 7nm too soon. Interesting since it means that 7nm will be the new "low tier" for the chinese

SMIC testing domestic immersion DUV machine | Electronics Weekly

SMIC is testing a domestically manufactured immersion DUV lithography tool, reports the FT. The machine is made by Yuliangsheng of Shanghai, a

www.electronicsweekly.com

Or even try to mass produce the 5nm

China's SMIC Reportedly Testing Nation's First Self-Built DUV Machine in a Major Breakthrough That Could Scale Production to 5nm

China's chip segment might have witnessed another breakthrough, as a new report claims that SMIC is trialing the first in-house DUV machine.

wccftech.com

And yeah, that's the limit of DUV.

 

[511]

bad news my friend bad news

Kind of expected tbh

 

[Josh128]

While the 6.5 GHz seems far-fetched personally to me, certain clock speed boost is certainly in order thanks to Fin- and Nanoflex.
You don't really need to go further than to see what mobile SoC manufacturers achieved with it.
Let's recap:

Node / Core family	Qualcomm Oryon	Arm performance core	Apple
N4/N5	Oryon Gen 1: 3.4 GHz (mainstream SKU), 4.0-4.2 (unobtanium)	X4: 3.39 (8 Gen 3)	Everest: 3.49 GHz (M2)
N3P	Oryon Gen 3: 5.0 GHz, 4.74(?) in phones	4.21 (X930, a massively bigger core)	M4-P core: 4.51 GHz (again, while going from 8 to 10 wide design), N3E

Im not sure how relevant that is, I mean Zen 4 hit 5.7GHz on 5nm and Intel struggled to make enough 285Ks that hit 5.7GHz on N3.

Qualcomm can be pretty dubious with their claims and slides as of late. The 5GHz doesnt seem to mean too much as the new X2 Elite Extreme in laptop form factor still loses in ST in Cinebench R24 vs both M4 Pro and Max, and loses both ST and MT to M4 Max.

 

[Darkmont]

and why do I feel like Darkmont will match LNC.

 

[CouncilorIrissa]

Im not sure how relevant that is, I mean Zen 4 hit 5.7GHz on 5nm and Intel struggled to make enough 285Ks that hit 5.7GHz on N3.

View attachment 131003

Well duh, an 8-wide dispatch core that is bigger in every single way is harder to clock than a slimboi in Zen 4.
Besides, it was Intel's first try at working with industry standard PDK's in a long while when it comes to CPUs. Them not being on top of physdes game is understandable.

Qualcomm can be pretty dubious with their claims and slides as of late. The 5GHz doesnt seem to mean too much as the new X2 Elite Extreme in laptop form factor still loses in ST in Cinebench R24 vs both M4 Pro and Max, and loses both ST and MT to M4 Max.

It's a 9-wide dispatch core with comically large caches (192 KB L1i!) running at 5 GHz, an absolutely nuts figure to even think of just a few years ago.
And it's not a Max competitor, it competes against the Pros.

 

[adroc_thurston]

an 8-wide dispatch core that is bigger in every single way is harder to clock than a slimboi in Zen 4.

Good news, Zen5 (also 8-issue) is 5.7 on N4p.
Bad news, NVL is %redacted%.

 

[Josh128]

Good news, Zen5 (also 8-issue) is 5.7 on N4p.

And apparently it holds its top boost better than Zen 4 as well. I could have used Zen 5 but went with the 2 year older chip for more effect. Either way, the example, doesnt lend much credence to N3 helping clocks.

 

[adroc_thurston]

the example, doesnt lend much credence to N3 helping clocks.

Well it does.
Intel just kinda sucks.

 

[Josh128]

Well duh, an 8-wide dispatch core that is bigger in every single way is harder to clock than a slimboi in Zen 4.
Besides, it was Intel's first try at working with industry standard PDK's in a long while when it comes to CPUs. Them not being on top of physdes game is understandable.


It's a 9-wide dispatch core with comically large caches (192 KB L1i!) running at 5 GHz, an absolutely nuts figure to even think of just a few years ago.
And it's not a Max competitor, it competes against the Pros.

Im not denying its impressive silicon, it is, its just not better than what Apple already has out from what I can see.

Its still beaten by the Pros in ST, and by the A19 silicon in GB ST testing in phone form factor. Apparently the latest ARM architecture is just flat out better for obtaining massive ST performance than x86. I'd love to see what QCOM or Apple could do with it on 2nm. >210 R24 1T is almost guaranteed for ARM while a +30% 1T increase for Zen 6 over Zen 5 will only get you in the low to mid 180's.

 

[511]

View attachment 131005

Darkmont doesn't believe in Darkmont 🤣🤣. I thought 7% IPC improvement would have been possible in Spec due to fixing the horrendous L3/Ring.

 

[Darkmont]

Darkmont doesn't believe in Darkmont 🤣🤣. I thought 7% IPC improvement would have been possible in Spec due to fixing the horrendous L3/Ring.

It's just less stops clocked slightly higher

 

[CouncilorIrissa]

Its still beaten by the Pros in ST, and by the A19 silicon in GB ST testing in phone form factor. Apparently the latest ARM architecture is just flat out better for obtaining massive ST performance than x86. I'd love to see what QCOM or Apple could do with it on 2nm. >210 R24 1T is almost guaranteed for ARM while a +30% 1T increase for Zen 6 over Zen 5 will only get you in the low to mid 180's.

And? This is relevant how to node's characteristics wrt/ frequency? The fact of the matter is that three different designers got massive frequency increases out of N3-based nodes while simultaneously widening the arch (sometimes to an absurd degree, such as with X4 -> X925/X930). Pretending that the node had nothing to do with it is just strange. But if you really want to think that a 100MHz bump (+1.7%) is the best you can do out of a double shrink, while the comp does like +30% (and yes, mobile manufacturers did have a much bigger voltage headroom -- that is undeniable), then be my guest. But that is indeed desperately wanting the thing to suck for the sake of being right.

Also keep in mind that in .gb6 the difference between the two is around 5-6% (~3600 vs ~3800). I'd argue that makes SD8EG5 the more impressive of the two considering the core is like 30% smaller. (2.2 vs 3.1mm^2)

And you're comparing MacOS to Windows. Just like Linux, MacOS is pretty much always faster in benchmarks.

 

[511]

Also keep in mind that in .gb6 the difference between the two is around 5-6% (~3600 vs ~3800). I'd argue that makes SD8EG5 the more impressive of the two considering the core is like 30% smaller. (2.2 vs 3.1mm^2)

And you're comparing MacOS to Windows. Just like Linux, MacOS is pretty much always faster in benchmarks.

SDE5 was on Android for windows cut like few more points

 

[CouncilorIrissa]

SDE5 was on Android for windows cut like few more points

He's talking about this Cinebench score, it's running WoA.

 

[Josh128]

And? This is relevant how to node's characteristics wrt/ frequency? The fact of the matter is that three different designers got massive frequency increases out of N3-based nodes while simultaneously widening the arch (sometimes to an absurd degree, such as with X4 -> X925/X930). Pretending that the node had nothing to do with it is just strange.

You cant extrapolate potential transistor switching speed gains above 5.7GHz by looking at gains achieved above 3.5GHz. The electrical and physical bottlenecks are completely different. Capacitance and inductance losses, not to mention heat, become exponentially more difficult to overcome with as you increase frequency and increase density. Its basic physics.

But if you really want to think that a 100MHz bump (+1.7%) is the best you can do out of a double shrink, while the comp does like +30% (and yes, mobile manufacturers did have a much bigger voltage headroom -- that is undeniable), then be my guest. But that is indeed desperately wanting the thing to suck for the sake of being right.

Oh no? Double shrink doesnt necessarily mean jack whatsoever for fmax. Im not trying to be right just for the sake of being right, Im being realistic. I dont expect 100MHz bump, I expect 300MHz-500MHz fmax bump. I just said I wouldnt be very surprised if 100MHz was all we got if we didnt have N2X.

Quintuple shrink
GloFo 32nm > TSMC N7: 5.0GHz (FX9590) > 4.7GHz* (3950X) 6% Loss

Double shrink
Intel 7 > TSMC N3B: 6.2GHz > 5.7GHz 500MHz 8% Loss

Single shrink
Intel 4 > TSMC N3B: 5.1GHz (185H) > 5.1GHz (288V) Equal

Zero shrink
TSMC 7nm: 1.905GHz (5700XT) > 2.581GHz (6700XT) 35% Gain