Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

Page 175 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

DisEnchantment

Golden Member
Mar 3, 2017
1,777
6,787
136
TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

1587737990547.png
N7 performance is more or less understood.
1587739093721.png

This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.


1587739615344.png

Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

---------------------------------------------------------------------------------------------------------------------------------------------------


FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
Last edited:

511

Diamond Member
Jul 12, 2024
3,464
3,339
106
They said mid single to low single digit billion revenue by 27 from external and this includes Tower/UMC.
 

Tigerick

Senior member
Apr 1, 2022
789
757
106
David Zinsner, chief financial officer of Intel, at the J.P. Morgan Global Technology, Media and Communications Conference. "We have […] a bunch of potential customers, and then we get test chips, and then some customers fall out in the test chips, and then there is a certain amount of customers that kind of hang in there. So, committed volume is not significant right now, for sure.

Hoho, finally CFO is telling the truth: It is almost 100% failure rate for external customer. I am sure IFS will give best deal on wafer prices, yet there is virtually no customer committed. The reason is simple: the yields are "horrible"; as I mentioned before regarding Intel Internal Business, IFS could ask Intel Design to flex the design to improve yield at the cost of die area. These "technique" won't work with external customers cause PPAC matter the most to external customers.

Hereby, I could say 18A is a failure process, there is no chance IFS could compete with TSMC, period. Any hearsay well is just a hearsay....
 

511

Diamond Member
Jul 12, 2024
3,464
3,339
106
Hoho, finally CFO is telling the truth: It is almost 100% failure rate for external customer. I am sure IFS will give best deal on wafer prices, yet there is virtually no customer committed. The reason is simple: the yields are "horrible"; as I mentioned before regarding Intel Internal Business, IFS could ask Intel Design to flex the design to improve yield at the cost of die area. These "technique" won't work with external customers cause PPAC matter the most to external customers.

Hereby, I could say 18A is a failure process, there is no chance IFS could compete with TSMC, period. Any hearsay well is just a hearsay....
You are reading too much into wrong thing the issue is and will be the PDK
 

511

Diamond Member
Jul 12, 2024
3,464
3,339
106
It could be both, you know ...
I can't believe the yield rumor from the public figures they have good enough D0 to enter Volume Production in H2 25 and I have not heard yield issue from people I talk to the only thing I hear is the PDKs.
 
Last edited:
  • Like
Reactions: DKR

DKR

Junior Member
Nov 19, 2024
10
15
41
Hoho, finally CFO is telling the truth: It is almost 100% failure rate for external customer. I am sure IFS will give best deal on wafer prices, yet there is virtually no customer committed. The reason is simple: the yields are "horrible"; as I mentioned before regarding Intel Internal Business, IFS could ask Intel Design to flex the design to improve yield at the cost of die area. These "technique" won't work with external customers cause PPAC matter the most to external customers.

Hereby, I could say 18A is a failure process, there is no chance IFS could compete with TSMC, period. Any hearsay well is just a hearsay....

Intel publicly claimed their 18A Best Wafers are already at HVM D0 in Q1'25 and the avg wafer will be at HVM D0 in Q4'25. If we consider the HVM D0 is 0.1 and avg D0 was ~<0.4 in Q3'24 as revealed by Pat Gelsinger, their current avg D0 could be around 0.2xx. Current D0 must be ranging from 0.3xx to 0.1xx in Q1'25 for their 18A wafers.

Repeatedly hearing that maturity of the PDK and IP ecosystem is not good as TSMC's. I think that is the reason for less external customer commitments for 18A. But who really knows 🤷‍♂.
1747321910168.png
 

eek2121

Diamond Member
Aug 2, 2005
3,392
5,024
136
Intel CFO has now publicly stated what I’ve mentioned a couple of times, Intel has no significant volume customers right now committed to 18a.



Based on this quote and others, they’re not going to be spinning customer engagement or sales pipelines as if they are signed agreements anymore, so sounds like they are making an effort to be more transparent moving forward, so that’s good.
The one thing you need to know about publicly traded companies is that they will NOT share news beyond established quotes. For a (fictional) example, Intel could have signed on Apple, and could be making ALL of Apple's chips, and yet the CFO would still give that statement unless legal teams between Apple and Intel could agree to provide an update. For smaller customers, that'll never happen at all, and they'll use earnings reports to show how they are doing instead. Oh and they will NEVER share potential business deals at all, until everything goes through legal, etc.

Hoho, finally CFO is telling the truth: It is almost 100% failure rate for external customer. I am sure IFS will give best deal on wafer prices, yet there is virtually no customer committed. The reason is simple: the yields are "horrible"; as I mentioned before regarding Intel Internal Business, IFS could ask Intel Design to flex the design to improve yield at the cost of die area. These "technique" won't work with external customers cause PPAC matter the most to external customers.

Hereby, I could say 18A is a failure process, there is no chance IFS could compete with TSMC, period. Any hearsay well is just a hearsay....
Building a business takes time, especially a business as complex as the one Intel is building. I encourage you to try it yourself if you think anyone here is misleading you. Even with unlimited funding, becoming profitable in THAT industry takes many years, sometimes decades. Getting companies to commit to millions/billions of dollars up front is actually a really hard thing to do. Intel is currently in the middle of this.

Intel isn't failing, they are actually doing fine.

You won't hear about anyone using them until products are completed and produced.
I can't believe the yield rumor from the public figures they have good enough D0 to enter Volume Production in H2 25 and I have not heard yield issue from people I talk to the only thing I hear is the PDKs.
From what I gather, yields are fine, the libraries are an issue (lack of features, etc.). Capacity is an issue because of Intel's own volume (if they use all N3/N2, they'll have ample capacity for customers, if they use all 18A, they will be short, so they are trying to balance it out).

I mean, to say again, this entire process does take lots of time. Ignore Intel's own time to ramp and stuff, you are looking at 1-4 years, depending on many variables. Intel's first serious push is likely to be on the high side of that due to uncertainty, tooling incompatibilities, etc. They absolutely won't be profiting handsomely before 2027-2030. It isn't possible. When they do, however, they'll actually have quite an advantage over others, unless the board screws the pooch and tries to break up the business.
 

maddie

Diamond Member
Jul 18, 2010
5,151
5,537
136
They absolutely won't be profiting handsomely before 2027-2030. It isn't possible. When they do, however, they'll actually have quite an advantage over others, unless the board screws the pooch and tries to break up the business.
Why do you say this? Curious.
 

Hitman928

Diamond Member
Apr 15, 2012
6,665
12,310
136
The one thing you need to know about publicly traded companies is that they will NOT share news beyond established quotes. For a (fictional) example, Intel could have signed on Apple, and could be making ALL of Apple's chips, and yet the CFO would still give that statement unless legal teams between Apple and Intel could agree to provide an update. For smaller customers, that'll never happen at all, and they'll use earnings reports to show how they are doing instead. Oh and they will NEVER share potential business deals at all, until everything goes through legal, etc.

It's not how Pat operated, so I guess he didn't get that memo.
 

LightningZ71

Platinum Member
Mar 10, 2017
2,389
3,034
136
No. The hardware.
Significant hardware errata this deep in the product cycle is kind of a big deal. The microcode changes to render those bugs benign often sacrifices notable amounts of performance and full mask response to correct them can take quite a long time to reach production quality.
 
  • Like
Reactions: Thibsie

511

Diamond Member
Jul 12, 2024
3,464
3,339
106
Every hardware has Errata it depends on what and how serious it.
Skylake was a lake of Errata 🤣
 

moinmoin

Diamond Member
Jun 1, 2017
5,236
8,443
136
They absolutely won't be profiting handsomely before 2027-2030.
But after that there is a chance for profit, and handsomely at that?

iu
 

jdubs03

Golden Member
Oct 1, 2013
1,257
889
136
Qualcomm and Mediatek are going to feel the heat soon.
Based on the other thread, they are just using the X925, so it’s not the situation I was thinking of. I thought it was a custom design. So from that perspective, props to Mediatek.