Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[Saylick]

It's not the metal interconnect resistance, the metal provides good heat conductance. The problem is that previously, the chips were positioned upside down with the bulk silicon both spreading the heat away from the transistors and providing good thermal conductance up to the next boundary which (combining a few layers together) allows you to interface with the heatsink. With BS-PDN, the chip is no longer upside down and the silicon is thinned down to a very thin layer (relatively), which both limits the ability for the bulk silicon to spread the heat out and introduces significant thermal resistance between the transistors and the next boundary due to all the dielectric layers that now sit between the transistors and the top of the chip.

The thermal resistance is still much less than going out through the socket, so in either case, nearly 100% of the heat still goes towards the heatsink, it's just that you will now have a larger hot spot effect. IMEC and others have published research on methods for partially mitigating the issue, but they aren't fully effective and mostly involve extra TSVs to spread the heat out more from the thinned substrate. There are other proposed methods that would solve it, but it gets pretty exotic and none of which are anywhere near ready for production as far as I know. In terms of density, since the TSVs are now either backside contacts or "Power Via", I don't think you'll need to really effect density to add thermal vias. I agree that most likely the high core count, low power per core products are probably the best fit for backside power. Electrically, it makes a whole lot of sense for high clocking parts to have it too, but unless Intel truly has figured out how to solve the thermal issue, it's hard for me to imagine that they wouldn't be thermally limited to the point of significantly lowered boost clocks without exotic cooling.

Thanks for the explanation. This is why I said it’s going to be interesting to see how this plays out for Intel since their 18A node appears to be strictly BSPDN. Meanwhile, TSMC is offering similar two nodes with and without BSPDN, N2 and A16, and their customers can choose if it’s right for them.

 

[OneEng2]

It's not the metal interconnect resistance, the metal provides good heat conductance. The problem is that previously, the chips were positioned upside down with the bulk silicon both spreading the heat away from the transistors and providing good thermal conductance up to the next boundary which (combining a few layers together) allows you to interface with the heatsink. With BS-PDN, the chip is no longer upside down and the silicon is thinned down to a very thin layer (relatively), which both limits the ability for the bulk silicon to spread the heat out and introduces significant thermal resistance between the transistors and the next boundary due to all the dielectric layers that now sit between the transistors and the top of the chip.

The thermal resistance is still much less than going out through the socket, so in either case, nearly 100% of the heat still goes towards the heatsink, it's just that you will now have a larger hot spot effect. IMEC and others have published research on methods for partially mitigating the issue, but they aren't fully effective and mostly involve extra TSVs to spread the heat out more from the thinned substrate. There are other proposed methods that would solve it, but it gets pretty exotic and none of which are anywhere near ready for production as far as I know. In terms of density, since the TSVs are now either backside contacts or "Power Via", I don't think you'll need to really effect density to add thermal vias. I agree that most likely the high core count, low power per core products are probably the best fit for backside power. Electrically, it makes a whole lot of sense for high clocking parts to have it too, but unless Intel truly has figured out how to solve the thermal issue, it's hard for me to imagine that they wouldn't be thermally limited to the point of significantly lowered boost clocks without exotic cooling.

Thanks for the correction.

Still, 18A will work well for Clearwater Forest and Diamond Rapids where clock speeds are kept at a relatively low speed (IMO). Nova Lake (desktop) on the other hand, this might cause a problem.

Thanks for the explanation. This is why I said it’s going to be interesting to see how this plays out for Intel since their 18A node appears to be strictly BSPDN. Meanwhile, TSMC is offering similar two nodes with and without BSPDN, N2 and A16, and their customers can choose if it’s right for them.

Yes, TSMC has gone the risk mitigating path. It is also my understanding that the design tools, and libraries are the same for N2 and A16 so it is easy for companies to move designs from one to the other.

As you point out, with Intel 18A, it is all or nothing.

 

[511]

https://twitter.com/x/status/1873513118036300189

Get ready to pay for Made in US Sticker

 

[Thunder 57]

https://twitter.com/x/status/1873513118036300189

Get ready to pay for Made in US Sticker

There haven't been any new tariffs yet. Honestly I see it as a negotiating tool but I don't want to get political. What does seem to be happening though is companies willing to increase prices and blame tariffs, just like they did when there was high inflation.

 

[511]

There haven't been any new tariffs yet. Honestly I see it as a negotiating tool but I don't want to get political. What does seem to be happening though is companies willing to increase prices and blame tariffs, just like they did when there was high inflation.

Tbf US is costlier than Taiwan to make Chips due to labour and other associated cost but as you said they are blaming it on tariffs

 

[desrever]

There haven't been any new tariffs yet.

There are tho

 

[Thunder 57]

There are tho

I haven't heard that and can't find any info on it but again I don't want to go off topic.

 

[Win2012R2]

I haven't heard that and can't find any info on it but again I don't want to go off topic.

There are a lot of existing tariffs on imports, that's before potentially new big ones might get introduced

 

[Thunder 57]

There are a lot of existing tariffs on imports, that's before potentially new big ones might get introduced

Sure, that's why I said "new tariffs". Either way I will not post on this anymore.

 

[Doug S]

Tbf US is costlier than Taiwan to make Chips due to labour and other associated cost but as you said they are blaming it on tariffs

Blaming it on "tariffs" can mean many things. One of which is "if the chips are made in Taiwan and the US is instituting x% worldwide tariffs" (or to avoid triggering China over Taiwan includes Taiwan as "China" in such tariffs) then instantly the demand for chips made in the US from US companies goes way up. With TSMC already at 100% utilization, they can raise the prices.

What's more, they don't need the tariffs to happen. They just need to call up US based companies and tell them "if you want to reserve an allocation of chips from the US fabs to protect yourself against the mere possibility of tariffs / trade war you have to lock in NOW" and they can get that 30% upcharge even if in the end the tariffs don't happen / don't affect TSMC's Taiwan output.

 

[511]

Blaming it on "tariffs" can mean many things. One of which is "if the chips are made in Taiwan and the US is instituting x% worldwide tariffs" (or to avoid triggering China over Taiwan includes Taiwan as "China" in such tariffs) then instantly the demand for chips made in the US from US companies goes way up. With TSMC already at 100% utilization, they can raise the prices.

What's more, they don't need the tariffs to happen. They just need to call up US based companies and tell them "if you want to reserve an allocation of chips from the US fabs to protect yourself against the mere possibility of tariffs / trade war you have to lock in NOW" and they can get that 30% upcharge even if in the end the tariffs don't happen / don't affect TSMC's Taiwan output.

If we set aside tariffs there are genuine issues like Labor Raw materials ( imported from TW/JP/Korea) that adds to cost

 

[Thibsie]

If we set aside tariffs there are genuine issues like Labor Raw materials ( imported from TW/JP/Korea) that adds to cost

Imagine in EU...
Would be even much worse IMO although there's as many good geopolitical reasons for EU to secure manufacturing in EU than it is for the US (in the US).

 

[511]

Imagine in EU...
Would be even much worse IMO although there's as many good geopolitical reasons for EU to secure manufacturing in EU than it is for the US (in the US).

Yes that is why Intel Madenburg didn't made sense for me Rapidus more so they would have better chances with 18A IP than with IBM IP

 

[SiliconFly]

.

 

[Meteor Late]

That will be no issue, as 18A is a N3P class node.

 

[SiliconFly]

.

 

[511]

Not N5 or N7?

There are way too many fake narratives out there that say 18A is only as good as the good old TSMC N3 or N5 or N7. Too many people out there still think Intel 18A is a 5nm class node. Some uninformed people even think it's a 7nm class node. But in reality, Intel 18A is a 2nm class node. Actually it's very close to N2 in density and better than N2 in performance. An awesome node that is not inferior to TSMC N2 by any means.

Hold on a second I don't think from the metrics shared that 18A is higher in density than N2 its SRAM and density from the metric shared publicly is in par with N3 and performance somewhere between N2 and N3P by all means it is a good node but 18AP is N2 level you could say

In fact, Intel 18A is the only 2nm class node that can actually hit volume on time in H2 2025 compared to TSMC N2 which Apple totally ditched now cos N2 volume was way too anemic due to TSMC N2 not being able to hit volume on time. Both TSMC N2 & A16 are a dud in 2025. They're expected to hit expected capacity only in 2026. No wonder 18A is being attacked left and right by competition.

Intel process leadership in 2025 appears to be true. Intel 18A is ahead of TSMC N2 by a year. Both Intel products... Panther Lake and Clearwater Forest will be based on leading edge process in 2025 compared to competition.

First it was hard to understand why 18A was being attacked left and right by competition, but now it's becoming clear. The competition is losing, thats why. Plain and simple.

I agree most of the FUD is being spread by the competition due to 18A being good kind of how Korean media spreads FUD against TSMC

 

[Doug S]

(X/Twitter: @) Rumor has it that Apple has ditched TSMC N2 in favor of N3P for their 2025 lineup due to lack of capacity/volume.

Meaning, no noteworthy N2 or A16 products next year that goes against 18A products like Panther Lake.

There are so many competing rumors about whether Apple will or will not use N2 in 2025 that it is pointless to try to track them all. We'll know before long whether N2 is even an option as at some point TSMC would want to tell their investors about this big customer they have that will generate a lot of N2 revenue for them in 2025.

 

[511]

There are so many competing rumors about whether Apple will or will not use N2 in 2025 that it is pointless to try to track them all. We'll know before long whether N2 is even an option as at some point TSMC would want to tell their investors about this big customer they have that will generate a lot of N2 revenue for them in 2025.

It ain't possible you can't show revenue for something until it has shipped capacity booking are one thing but it is reflected in revenue only when it is shipped so there will be no N2 revenue before Q4 25

 

[Win2012R2]

First it was hard to understand why 18A was being attacked left and right by competition, but now it's becoming clear. The competition is losing, thats why. Plain and simple.

Why did they fire Pat then?

 

[DrMrLordX]

Why did they fire Pat then?

Possibly because Gelsinger wouldn't agree to spin off the fabs in any circumstance. The board probably has a plan to do that, though we can only guess at what the trigger conditions are for that move.

 

[Win2012R2]

Possibly because Gelsinger wouldn't agree to spin off the fabs in any circumstance.

Why spin off fabs when 18A is so good and competition is losing so badly it has to attack that process? Use it for your own products to wipe the floor with competitors, think about spinning off later once everybody sees Intel is winning - more money that way.

Seems more likely that 18A run into serious problems that will become apparent to public only next year, and since that was the main project Pat pushed sacking him would make sense.

 

[DrMrLordX]

Why spin off fabs when 18A is so good and competition is losing so badly it has to attack that process?

Ask the board.

 

[NTMBK]

Why spin off fabs when 18A is so good and competition is losing so badly it has to attack that process? Use it for your own products to wipe the floor with competitors, think about spinning off later once everybody sees Intel is winning - more money that way.

Seems more likely that 18A run into serious problems that will become apparent to public only next year, and since that was the main project Pat pushed sacking him would make sense.

Because their products are not in high enough demand to fill the fabs, and provide the funding to progress beyond 18A. Their GPUs are not doing great, their AI business is a flop, Altera is not high volume, etc. Their next gen server chips should be competitive, but a lot of datacentre budget is going into either home-grown ARM chips or AI accelerators (Nvidia or home grown)- that isn't a growth business that will fill the fabs. And Intel has given up on mobile.

If they want to fill their fabs they need non-Intel products to manufacture, and the only way to convince direct competitors to trust them with their designs is to spin off the fabs.

 

[dttprofessor]

Because their products are not in high enough demand to fill the fabs, and provide the funding to progress beyond 18A. Their GPUs are not doing great, their AI business is a flop, Altera is not high volume, etc. Their next gen server chips should be competitive, but a lot of datacentre budget is going into either home-grown ARM chips or AI accelerators (Nvidia or home grown)- that isn't a growth business that will fill the fabs. And Intel has given up on mobile.

If they want to fill their fabs they need non-Intel products to manufacture, and the only way to convince direct competitors to trust them with their designs is to spin off the fabs.

It's wrong.