Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

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Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

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N7 performance is more or less understood.
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This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.


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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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Doug S

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Feb 8, 2020
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Saw a couple of interesting articles at wccftech recently.

UBS report claims TSMC is "ahead of schedule" installing N2 equipment.

ET News claims TSMC will start risk production of N2 next week.

Starting risk production this month might make it possible for them to begin mass production in time for A19 next year, which would fit in line with the rumors that Apple had bought up all the initial N2 supply. I had previously not believed that was realistic, but I was assuming N2 would be a similar schedule to N3B/N3E. It is still tight, TSMC would have to turn around from risk to mass production in less than a year but that's doable if things go smoothly.

In late May there were stories that TSMC's VP of process development had claimed yields "when applying GAA" had reached 90% of the target. Based on their graphs in the past TSMC has gone to risk when they hit 80% and mass production when they hit 90%, so I guess 90% of the target 90% = 80%? TSMC pushing forward equipping N2 lines would seem to indicate they're pretty confident and have someone ready to take delivery. And I suppose worse comes to worse they could enter mass production a few percent below 90% if it was necessary to meet customer timelines assuming that customer was willing to take the hit in usable chips per wafer.
 

LightningZ71

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Mar 10, 2017
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Any wonder why AMD is using Samsung's SF4 family for some of their Zen5C CCDs and plans to use SF3 for future products?
 

LightningZ71

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Cost of production. Keeping Samsung in the game keeps at least somewhat of a lid on what TSMC can charge for wafers. Even if AMD just keeps throwing their "value" line processor work at Samsung, it keeps development funds going their way.
 
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adamge

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Would the customer really pay for defective chips? I would have thought the customer would sign a contract for X number of functional chips, and the risk of yield falls on the manufacturer.
 

Ghostsonplanets

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Would the customer really pay for defective chips? I would have thought the customer would sign a contract for X number of functional chips, and the risk of yield falls on the manufacturer.
It depend on the contract. Paying for KGD only is usually reserved for very special deals with key priority targets (e.g: Samsung and NVDA/QCOM contract).
 

KompuKare

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Jul 28, 2009
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It depend on the contract. Paying for KGD only is usually reserved for very special deals with key priority targets (e.g: Samsung and NVDA/QCOM contract).
That plus, what priece should the foundry set for functioning dies?
If your die is under 100mm², pay X
If your die is 800mm², pay X^8.
Or take the yield risk yourself.
 
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oak8292

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Sep 14, 2016
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Would the customer really pay for defective chips? I would have thought the customer would sign a contract for X number of functional chips, and the risk of yield falls on the manufacturer.
Chip design affects functional yield. If the customer design is aggressive then they can have a big impact on yield. If TSMC was responsible for both process and layout then good die would be appropriate.
 

LightningZ71

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Now I'm curious about which die in particular AMD is getting from Samsung. The rumors point to there being two different Zen5C CCDs, one group made with TSMC N3B and another group made on Samsung SF4P/4LPP+.
 

Doug S

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Would the customer really pay for defective chips? I would have thought the customer would sign a contract for X number of functional chips, and the risk of yield falls on the manufacturer.

Foundry pricing is per wafer. Paying per die like Apple did for N3B is a special case - TSMC knew the process was problematic and yields were not up to snuff - plus Apple is by far their largest customer (responsible for 25% of TSMC's overall revenue) so they're willing to cut them a deal.

I doubt anyone is getting similar pricing, and if they do manage to negotiate it the foundry likely sets the pricing high enough that they make MORE money that way.
 
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CakeMonster

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If N2 is doing well one can at least hope that Z6 on N3* will be profitable to release before another 24 months have passed.
 
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jdubs03

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Oct 1, 2013
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Must be getting some good discounts on wafer prices.
Looks like that node - SF2 is renamed SF3P. But I mean its not like we know the actual dimensions.

From afar it seems as if Samsung's foundry has kind of a bumbling reputation from lower yields in the past. And hence the need to offer sweetheart deals to less big-time players. Maybe they'll gain some ground? They look to be early to GAA and 2nm. Though Intel is basically right there. This time around, it looks as if TSMC has been conservative with 2nm, yet their reputation is golden and been hard won over the past decade, while Intel primarily slipped bad as we all know.

 
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Doug S

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If anyone is getting per good die pricing it is likely Samsung customers. I don't see how they could get any customers at per wafer pricing - even if they slashed the price all the way down to their variable per wafer cost it sounds like their yields are so bad you might still end up paying more than at TSMC! And that's before you compare performance, which based on products using Samsung's fab appear to compare rather poorly with contemporaneous TSMC chips.
 
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LightningZ71

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Samsung still makes sense for the lower performance "value" segment. I'm actually kind of surprised that AMD didn't tap Samsung for Mendocino as they had process tech at the time that was at least as good as TSMC N6 and might have gotten favorable pricing. Maybe they talked to them about it but couldn't make the numbers work for the secondary costs associated with starting another supply chain.
 
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Doug S

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Samsung still makes sense for the lower performance "value" segment. I'm actually kind of surprised that AMD didn't tap Samsung for Mendocino as they had process tech at the time that was at least as good as TSMC N6 and might have gotten favorable pricing. Maybe they talked to them about it but couldn't make the numbers work for the secondary costs associated with starting another supply chain.

It still has to be priced lower than TSMC per chip to make sense. Paying per wafer at Samsung's yields would be a big risk that you'd want to defray by getting them to guarantee a per chip price. Otherwise if the yield is less than projected (whether that's their fault or yours) you'd end up paying more for your "value" segment chips that are already on thin margins. Maybe paying per wafer is attractive if you like risk and want to bet their yields will increase over time, thus driving down your per chip cost (unless they compensate for that by raising their per wafer pricing...)

Those secondary costs you bring up is a good point WRT to modern packaging too. Back when you were talking single chips it didn't particularly matter which foundry you got them from, both TSMC and Samsung could package that individual chip for say AM4 socket equally well. The more complex your packaging gets with chiplets, TSVs for stacking, and so forth bringing another foundry into the mix complicates matters. Unless you're Intel, and you do your own packaging.
 
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jpiniero

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Oct 1, 2010
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It still has to be priced lower than TSMC per chip to make sense.

Well duh.

Paying per wafer at Samsung's yields would be a big risk that you'd want to defray by getting them to guarantee a per chip price.

Apple only got that on N3B because there was literally no point of using N3B otherwise since the wafer price was substantially more than N4.

Otherwise if the yield is less than projected (whether that's their fault or yours) you'd end up paying more for your "value" segment chips that are already on thin margins. Maybe paying per wafer is attractive if you like risk and want to bet their yields will increase over time, thus driving down your per chip cost (unless they compensate for that by raising their per wafer pricing...)

Or you could do what Intel does with 10 nm... and that's sell cut down dies.
 

dullard

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I figure this is the best thread for it. But, a simple question / answer is having major impacts today on foundries and companies that rely on them.
Trump said, “Taiwan should pay us for defense.”...″[Taiwan] did take about 100% of our chip business,” Trump said.

Impact today so far:
  • TSMC stock down 9%,
  • ARM stock down 8%,
  • AMD stock down 8%,
  • NVidia stock down 5.5%,
  • Apple stock down 3%,
  • Intel stock up 3.5%.
I've been mentioning the problems of putting so many eggs in one TSMC basket for years and got no traction (at least on this forum). I hope this is a wakeup reminder for people, and that nothing bad actually comes from it.
 
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Markfw

Moderator Emeritus, Elite Member
May 16, 2002
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I figure this is the best thread for it. But, a simple question / answer is having major impacts today on foundries and companies that rely on them.


Impact today so far:
  • TSMC stock down 9%,
  • ARM stock down 8%,
  • AMD stock down 8%,
  • NVidia stock down 5.5%,
  • Apple stock down 3%,
  • Intel stock up 3.5%.
I've been mentioning the problems of putting so many eggs in one TSMC basket for years and got no traction (at least on this forum). I hope this is a wakeup reminder for people, and that nothing bad actually comes from it.
But the fact is, we all know that the US WILL protect Taiwan if china gets really involved. Trump or not. He was only stating the truth,
 

Nothingness

Diamond Member
Jul 3, 2013
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I figure this is the best thread for it. But, a simple question / answer is having major impacts today on foundries.


Impact today so far:
  • TSMC stock down 9%
  • ARM stock down 8%
  • AMD stock down 8%
  • NVidia stock down 5.5%
  • Apple stock down 3%
  • Intel stock up 3.5%.
I've been mentioning the problems of putting so many eggs in one TSMC basket for years and got no traction (at least on this forums). I hope this is a wakeup reminder for people, and that nothing bad actually comes from it.
What alternative was there to TSMC? Intel, the company that takes subsidies from the government and has accumulated process issues for 10 years?