Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

AnandTech Forums: Technology, Hardware, Software, and Deals

Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

www.anandtech.com

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

AnandTech Forums: Technology, Hardware, Software, and Deals

Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

www.anandtech.com

Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

---------------------------------------------------------------------------------------------------------------------------------------------------


FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

 

[SiliconFly]

-

 

[Ghostsonplanets]

Wrong. 20A & 18A are vastly different nodes. And ARL-H mobile is based on 20A. Meaning, it needs to hit critical volume for Intel to survive. 20A is not a joke node like you say.

? 20A is basically a preview nodelet of 18A. It doesn't feature full library nor is meant to be used for anything else than ARL-S 6+8, just like Intel 4 wasn't meant for anything other than Meteor Lake Compute Tile. It's a de-risk measure.

18A is the node which will hit volume, not 20A. Panther Lake will be the volume driver for 18A.

 

[SiliconFly]

-

 

[Ghostsonplanets]

20A is ARL-H. And yes, it needs to hit volume for Intel to do well on mobile clients. Otherwise, Intel will be in trouble.

ARL-H is N3B. 20A is part of 6+8 Desktop volume.

 

[DavidC1]

Wrong. 20A & 18A are vastly different nodes. And ARL-H mobile is based on 20A. Meaning, it needs to hit critical volume for Intel to survive. 20A is not a joke node like you say.

I don't know what is a "joke" node but it's limited as Intel 4 is, and based on current leaks, it's even more limited being used only on a subset of a smaller market unlike Meteorlake.

It doesn't have enough libraries and it'll likely underperform despite "PowerVia and RibbonFET". High level specs mean nothing when they are immature. Why do you think TSMC is being used for the rest? Are they just trolling Intel Foundry?

You keep flip flopping being extremely biased towards them and in the next minute, calling doom and gloom for Intel. How old are you?

 

[SiliconFly]

-

 

[DavidC1]

Apparently, you're the one spreading doom & gloom!

This is why I ask how old you are.

This is not gloom and doom, but following the rationale behind their decisions. If 20A was so good, why would it be used in an extremely limited fashion and it's N3 elsewhere? It's not being used for mobile, where it needs to be power efficient and it's not being used for K where it needs performance.

Then the conclusion is very likely that 20A is just not that very good. 6+8 -S is a middling part so little bit underperforming isn't a problem. 20A is a "joke" node.

It is similar to Intel 4 vs 3 situation. With Intel 4 we have Meteorlake, which is underwhelming. Then we have Intel 3 with Sierra Forest which is pretty good. This is how Pat is skipping nodes, by establishing enough of a base for yield learning and then bringing the real one quickly. That means the "yield vehicle" could suck.

 

[fastandfurious6]

intel keeps being unable to create high perf/watt chips in their new nodes

it's either 20watt ULV in new nodes or 300watt monsters in old nodes, consistent pattern

this is reflected in meteor lake regression as well

can someone explain this pattern in real terms

 

[DavidC1]

it's either 20watt ULV in new nodes or 300watt monsters in old nodes, consistent pattern

What do you think the Xeon 6 E core chips are?

Also they are in a transitional phase. Once they get to 18A more will use their own node.

And while doubts exist, after Computex it seems that they are well on their way to executing their plans.

 

[fastandfurious6]

20A is a "joke" node.

intel is a joke

fixed it for u

jokes aside, pat's intel is clearly pushing marketing with node-jump-miracles while the chips are very underwhelming

but it keeps "spirits" and "hype" in the market somewhat upwards which keeps the company afloat

pat's strategy: fake it till u make it

 

[reaperrr3]

Simple answer. Capacity. It takes time to build capacity.

And money, and herein lies the problem with 20A, in my opinion.

Everyone including Intel themselves is waiting for 18A for the big volume products, so they'll likely never install 20A anywhere outside their one R&D production line in Santa Clara (at least that's where I'd expect it to be located), as the products built with it will be relatively short-lived, relatively low-volume and relatively low-margin, so investing too much capital on such a stop-gap process isn't worth it.

That doesn't have to mean it's bad, but since something better (and more complete in terms of libraries) is more or less around the corner, they just won't bother equipping additional fabs with 20A, or optimizing it as much as a high-volume process.

 

[igor_kavinski]

Here you go, @SiliconFly



Your claim to fame for coining the term "Joke Node"!

Now get to work writing a paper on it and publish it ASAP before anyone else beats you to it and steals your idea.

Hint: You can publish in minutes with ChatGPT!

 

[trivik12]

its almost feel like to hype the progress Intel created Intel 4/20A which seem like a beta node from which the real stuff will be on Intel 3/Intel 18A. Full node cost like 10B-20B. So it needs multiple products over several years to pay back. I wonder if we will see in Intel financial statements around how Intel 4 will be depreciated/Amortized.

 

[Khato]

so they'll likely never install 20A anywhere outside their one R&D production line in Santa Clara (at least that's where I'd expect it to be located)

FYI, Intel's R&D production line is D1X in Hillsboro Oregon. Despite the 'silicon valley' name, Santa Clara hasn't had active fabs for quite some time. Just a few too many earthquakes around here compared to alternative locations.

 

[Geddagod]

intel keeps being unable to create high perf/watt chips in their new nodes

it's either 20watt ULV in new nodes or 300watt monsters in old nodes, consistent pattern

this is reflected in meteor lake regression as well

can someone explain this pattern in real terms

That's not it.
The new nodes are limited in terms of Fmax, partly due to just Intel's inability to get higher clocks, but also because their old nodes also are improved to such an extent (due to them being able to improve it for years, as well as perfect binning and yields) that their Fmax is often able to out compete the final version of their old node.
You bring up MTL as an example, so let's see- MTL's fmax is 5.1 GHz, vs the 12900H Fmax of 5GHz. The 13900H, which I should remind you, was never meant to exist if Intel was able to hit their original timelines, is the one that hits 5.4GHz, giving MTL a regression. If Intel followed their original roadmap, then MTL wouldn't be a regression (or at least not a large one).

I don't prefer worshiping any companies.

That's not how you show you don't worship companies. You show that by being moderate in all your stances (well the ones that deserve it), not going from one polar opposite to another.
MLID does the exact same thing- either something Intel does is amazing, or something Intel does is DOA. There is no in between- when in reality, there often is.

its almost feel like to hype the progress Intel created Intel 4/20A which seem like a beta node from which the real stuff will be on Intel 3/Intel 18A. Full node cost like 10B-20B. So it needs multiple products over several years to pay back. I wonder if we will see in Intel financial statements around how Intel 4 will be depreciated/Amortized.

This applies less for 20A, but Intel didn't create Intel 4 for hype, they needed Intel 4 to catch up to AMD as fast as possible. The incomplete libs is a result of them needing to push out a node as fast as possible, not for stocks, but for being competitive. MTL is going to be pushing out as much volume as they can, and don't forget, Granite Rapids was originally meant to be on Intel 4 as well before it was pushed back.
Intel not having as much volume on 20A/Intel 4 never seemed to be the original plan- rather it seems to be a by product of product delays, or in the case of Intel 20A- perhaps just not being competitive enough, or ready on time.

 

[trivik12]

https://twitter.com/x/status/1805916640837840952

Samsung's 1st 3nm SOC for watch to come with 1 A78 cores and 4 A55 cores. Not sure what Samsung is cooking here. Who is asking for single threaded performance in a smart watch. It will just eat battery lot faster.

 

[dttprofessor]

D1x is not just a R&D line.

 

[igor_kavinski]

It will just eat battery lot faster.

Maybe it plugs into the bloodstream and eats glucose!

 

[SiliconFly]

-

 

[SiliconFly]

-

 

[igor_kavinski]

Intel still has a lot of hurdles before they become no. 1. Until then...

Can't disagree with that.

 

[Thunder 57]

I already said it many times before & will repeat it again. One single word. Capacity!

Hopefully you won't do it this way:

Link to gif

 

[DavidC1]

Fact is, overall IFS financials matter. For 18A to succeed, they have to start with 20A. Just what exactly is happening now. Not something trivial. I believe Intel has to deliver on their 20A promise, otherwise they're in big trouble. And I strongly believe they're gonna deliver in 2nm GAAFET + BSPD. No negative leaks as of now.

Whatever Koolaid you need to think 20A will "deliver" when it's only going to be used in a subsection of a smaller market.

In fact I can't think of a better endorsement for how AWESOMESAUCE 20A will be.

 

[lightisgood]

Welcome back Intel 3.
The king of high-speed logic (HPC) !

VLSI Technology Symposium – Intel describes i3 process, how does it measure up? - Semiwiki

At the VLSI Technology Symposium this week Intel released details on their i3 process. Over the last four nodes Intel has had an interesting process progression. In 2019, 10nm finally entered production with both high performance and high-density standard cells. 10nm went through several...

semiwiki.com

 

[LightningZ71]

Quoted from the above article:

"Conclusion

Intel’s i3 process is a significant step forward from Intel’s i4 process with better density and performance. Intel’s i3 process is a more competitive foundry process than previous generations. Cost is more in-line with other foundry processes, density is slightly lower than Samsung 3nm and much lower than TSMC 3nm, but it has the best performance of the “3nm” processes."

They sacrificed a bunch of density to get those performance numbers. Looking back at "i7" vs. OG 10mm, they made the same trade to get to 6Ghz. All the foundrys are dealing with the same physics. It just depends on how you want to make the PPA trade.