IPC

[richaron]

Hi all,

As a reader of ~technical~ forums, and just out of curiosity, I'm interested in seeing what people mean when they use the abbreviation "IPC". I'm wondering if we even mean the same thing whilst trying to have a discussion.

So, being honest & non-judgemental, what's the first thing you think when reading "IPC"?

 

[NostaSeronx]

IPC = Instructions per Clock
CPI = Cycles per Instruction

If you want to get into why SMT is used in processors; (Also, helps explain CPI and IPC)
http://www-03.ibm.com/systems/resources/pwrsysperf_SMT4OnP7.pdf

 

[richaron]

Thanks Nosta tho I think you may have missed the point of this thread, clearly there are many people who could vote on any option above. With language meanings are fluid, there's an argument that something means "exactly what I thought it meant when I wrote it".

Even what you consider the "wrong" meaning can be perfectly acceptable, even "right" meaning amongst other groups of people. I was simply wondering where we are with IPC.

 

[DominionSeraph]

Even what you consider the "wrong" meaning can be perfectly acceptable, even "right" meaning amongst other groups of people. I was simply wondering where we are with IPC.

IPC is instructions per clock, period. What the hell would, "Instructions per core," even mean, and why would it be a relevant indicator of anything?
I know, let's start a thread as to whether "hp" means "horsepower," or, "hydrogen atoms per car."

 

[Xpage]

Boom nailed it!

Would be better to ask the definition of SMT or CMT

 

[NTMBK]

It's not a matter of opinion, it's a matter of being correct or incorrect. It's "instructions per clock".

 

[Nothingness]

In fact, it's instruction per cycle

 

[witeken]

Which is the same.

You could also say instructions per clock cycle.

 

[Ancalagon44]

Looks like everyone is on the same page thus far. Not a single wrong answer.

 

[NTMBK]

In fact, it's instruction per cycle

...clock cycle.

 

[Dribble]

Whatever the acronym actually stands for it's generally used to indicate single thread performance. Instructions per cycle is just part of what gives that performance, and even that is a vague term - is that peak, average? What type of instructions must be included? - any, some specific mix, etc.

 

[teejee]

Whatever the acronym actually stands for it's generally used to indicate single thread performance. Instructions per cycle is just part of what gives that performance, and even that is a vague term - is that peak, average? What type of instructions must be included? - any, some specific mix, etc.

exactly, IPC is a vague term in practice.
Are there any de facto standard how to measure IPC out there?

 

[witeken]

I think most people simply use it as the average single threaded performance per clock cycle. If Haswell is 10% faster than Sandy Bridge on average at the same clock speed, it has a 10% higher IPC.

 

[NTMBK]

exactly, IPC is a vague term in practice.
Are there any de facto standard how to measure IPC out there?

Not any especially good ones. IPC differs massively depending on what code you use. If you have lots of memory stalls in your code, its IPC will be much lower than something that is just banging on straight line arithmetic with a working set that fits into L2.

 

[ThatsABigOne]

Not any especially good ones. IPC differs massively depending on what code you use. If you have lots of memory stalls in your code, its IPC will be much lower than something that is just banging on straight line arithmetic with a working set that fits into L2.

Branch on condition jumps also tend to destroy the IPC unless there is a really good branch predictor that predicts the right outcome correctly each time.

 

[Techhog]

Next thread: When you see "CPU," do you think of "central processing unit" or "clowns per unicycle?"

 

[tential]

So how will we figure out how to turn this topic, which is clearly impossible to disagree upon, into a massive debate?

 

[Nothingness]

...clock cycle.

Interestingly, in "Computer Architecture: A Quantitative Approach", H&P define IPC as Instruction Per Clock and CPI as Clock cycle Per Instruction. Oh well it doesn't matter it all means the same

Branch on condition jumps also tend to destroy the IPC unless there is a really good branch predictor that predicts the right outcome correctly each time.

Modern branch predictors are typically well above 80% of correct predictions (and in fact above 90% in non pathological programs). The issue with branch misprediction is that if you get it wrong, you have to cancel everything you did speculatively after the mispredicted branch, while you can still execute instructions safely under a load miss.

 

[ninaholic37]

Are there any de facto standard how to measure IPC out there?

Here's a rough IPC guideline for instructions on an 8086.

 

[richaron]

Well I doubt anyone will chime in voting for "core" at this stage, but it's nice there is a consensus here at least. Quite a few times I've seen a higher frequency chip recommended because of "IPC".

I can pretend this was a public education thread, or a comment on the irony of people getting angsty over the suggestion of a bastardised term (whilst using English), but mostly I was curious/concerned as to what people thought. So thanks.

Edit: FWIW I've always considered IPC as an exact term related to a specific code path. Current usage is quite analogous to a nub thinking it means "instructions per core".

 

[EightySix Four]

Quite a few times I've seen a higher frequency chip recommended because of "IPC".

Uhh, that makes sense...

 

[nickbits]

Inter process communication

 

[Nothingness]

Here's a rough IPC guideline for instructions on an 8086.

This one has latency and throughput for many CPU, including Haswell and Bulldozer.

 

[crashtech]

Uhh, that makes sense...

No, a core that is faster (in GHz) may have higher ST performance, but not necessarily higher IPC.

 

[EightySix Four]

No, a core that is faster (in GHz) may have higher ST performance, but not necessarily higher IPC.

I misread, I thought he meant he had seen higher frequency chips WITH high IPC recommended over more cores.