Intel Skylake / Kaby Lake

[Shivansps]

Yea, without all those "anti-consumer" tactics, we would have had to live with much inferior cpu performance for the past ten plus years.

I dont think there is a single, legal, anti-consumer tactic that AMD did not do at some point in time. Im really sick of that "one is good and the other is bad" thing. That is not real. Im 31 years old i was screwed by both at some point in my life, way more with AMD than Intel btw, yet, i only had 2 intel CPUs, a I3-530 and a I5-2500K that i used for 6 years and i dont have anything bad to say about it.

On Intel defense, they had way too many issues with both 14 and 10nm, not sure if it was a anti-consumer tactic, or that they just failed badly with these two process. If 10nm was good, they whould probably had 8C CNL-S in the market, and Ryzen whould not be a issue at all to them.

 

[2blzd]

lol @ sweeper jokes.

 

[IntelUser2000]

I dont think there is a single, legal, anti-consumer tactic that AMD did not do at some point in time. Im really sick of that "one is good and the other is bad" thing. That is not real.

On Intel defense, they had way too many issues with both 14 and 10nm, not sure if it was a anti-consumer tactic, or that they just failed badly with these two process. If 10nm was good, they whould probably had 8C CNL-S in the market, and Ryzen whould not be a issue at all to them.

I've read a translated version of CanardPC's article about Intel. The accusations make sense. It says the problem was due to Brian Kraznich, the current CEO, and Paul Otellini the previous CEO.

Paul Otellini was clearly the better CEO. But he made strategic blunders. Overall execution(I guess micro execution?) was far more solid. They should have chosen David Perlmutter as a CEO instead. They say he didn't get chosen cause he wasn't American. There was also his age though. I think he would have been 63 if he became CEO. Very close to retirement, and I've heard Intel doesn't like to keep people beyond retirement age.

How bad are the process technology delays? Well, they do say 10nm is insanely hard to do, and other manufacturers like TSMC and Samsung won't do much better. But Intel was the one that had the decisive lead. I don't even know they have any lead anymore. Their claims of process superiority seems nothing different than what TSMC and others are saying. Their claims used to have some merit.

No delay:
Mid to late 2014: 14nm Broadwell
Mid to late 2015: Skylake
Mid to late 2016: Cannonlake

Yea... that's how bad. Man its amazing how much better at execution Nvidia is. Nvidia clobbers them everywhere where the two directly compete. Jen-Hsun Huang led Intel+Nvidia would have been awesome. Heck its a toss up between HP's Leo Apotheker and Brian Kraznich for who's more of a terrible CEO.

I've made an observation few years ago that companies accelerate the decline when faced with challenges. I've seen management make appalling decisions at Blackberry(RIM) and Nokia. Rise of mobile is what would be killing these companies if it happens. All the things that characterized HP, Intel as great companies, none of them apply today, none. There's no such thing as the "HP way" or "Only the Paranoid survive". They both died when the CEOs that followed that sort of discipline gave way to their successor. They are both run by accountants who wants nothing but micromanage its finances and extract every cent from employees and customers.

 

[DrMrLordX]

Caution, sample size of 1.

Keep in mind that this maybe a motherboard/BIOS issue still. AdamK47 has a different motherboard than me. I think that is more likely the case than the CPU itself.

All possible. I just don't see (yet) how the motherboard itself could be implicated in what should be a fairly standard implementation of the m.2 spec according to Intel's design. How much wiggle room do they have in designing that part of the board? That's like having too-slow PCIe 16x slots. Does that ever happen?

Wake up to what? AMD has been doing so many bad things over the years that they gained way too much bad fame,

I dont think there is a single, legal, anti-consumer tactic that AMD did not do at some point in time.

Are you quite serious? Is AMD paying OEMs not to carry Skylake-X? I'd be fascinated to know more about that.

 

[AdamK47]

I know little Kaby Lake-X isn't getting much love. I'm loving mine though. For 24/7 usage I settled on 4.75GHz with 1.25V. The uncore / L3 cache is at 4.375GHz. I was able to get the memory up to 4333 with its default 19-19-19-39-2T timings. It has passed all of my stress testing.

5.0GHz is possible, but it requires 1.35V. That's too much to stay under thermal throttling during stress tests. Upping the fan speed on the three Corsair ML120s doesn't make a difference on the 360mm AIO cooler I'm using. I suspect it's the TIM and I don't want to delid it.

 

[Edrick]

For a side by side comparison with yours. The results I posted earlier in this thread.

FINALLY!!! Spent all night trying to figure out what was wrong with my system. Turns out the only issue was "power" features. My CPU was not running at max speed during the benchmarks. Fixed that and my result is now as expected.

 

[wildhorse2k]

Actually I didn't mention performance. But there is an advantage when turbo cannot be maintained, especially in thermal situations.
...
I'm sure thermals won't get better as core counts increase without lowering base clocks.

Otherwise there would be No Reason at ALL to reduce base clocks as Pricing and Core counts Increase especially for single core performance.

With lower frequency you can lower voltage leading to lower TDP per core. Reason to reduce base clocks is to achieve higher few core turbo clocks while TDP remains constant.

What's your source of information that convinced you that Xeons/HEDT chips can't run at all core turbo 24/7 under stock frequencies and are not possible to cool to maintain them?

 

[wildhorse2k]

FINALLY!!! Spent all night trying to figure out what was wrong with my system. Turns out the only issue was "power" features. My CPU was not running at max speed during the benchmarks. Fixed that and my result is now as expected.

That looks very good. What specifically did you change? So now we know Skylake-X has full performance of M.2 when CPU PCIe lanes are used. Could you also re-test M.2 on PCH?

 

[JoeRambo]

FINALLY!!! Spent all night trying to figure out what was wrong with my system. Turns out the only issue was "power" features. My CPU was not running at max speed during the benchmarks. Fixed that and my result is now as expected.

Setting power to high performance, and minimum Processor state to 100% and rerunning the M.2 tests for Skylake-X would remove Windows power mgmt factor.

Told you so, don't underestimate impact of Windows power management. Honestly i feel that forcing 100% processor state is what every PC enthusiast should do - it costs maybe 1-2 watts on modern Intel cores*, but avoid clocks moving down to 800mhz where even OS code telling CPU to clock up is running 5-6 times slower than needed.

* Easy to see with a tool that shows clocks and unhalted cycles and core powers. CPU clock will still be high, unhalted cycles tiny.

 

[DrMrLordX]

FINALLY!!! Spent all night trying to figure out what was wrong with my system. Turns out the only issue was "power" features. My CPU was not running at max speed during the benchmarks. Fixed that and my result is now as expected.

Problem solved! I wonder how many others have had the same problem.

 

[TheF34RChannel]

Intel is going to change the TIM or soldering the chips? A DC refresh or something I guess?

It's been real quiet about this for SKL-X. I doubt they will though.

I'd wish they'd use solder for CFL - but alas no chance. Would be ideal to keep the same temps as I have now (in Celsius: 56, 54, 53, 53 = very decent for an AIO).

Coffee Lake tidbit of the day: Core i7-8700K offers close to 50% throughput performance increase over its predecessor (based on Turbo).

Presumably due to the two additional cores, meaning it's expected.

Any idea on what it is design wise? An altered KBL or something else?

 

[arandomguy]

What he is implying is all core turbo for 6 core CFL will nearly match that of 4 core Kabylake within roughly the same official power envelope. This was not universally expected by all.

What I was hoping for is the 8700k to be 50% more MT throughput than the 6700k at the same power.

 

[wahdangun]

That chart doesn't show clockspeeds at all. There is actually software out there that runs slower with HT enabled right off the bat without any thermal throttling (depending on the iteration of HT), and you've done nothing to show that SpecAPC Render is losing performance due to HT from reductions in clockspeed.

Try again?

Umm i'm just saying that if the core was fully used then HT will get negative scaling. right now all my server was xeon without HT (equivalent to core i5) so if you have any SMT cpu you can prove mya point.

 

[formulav8]

What's your source of information that convinced you that Xeons/HEDT chips can't run at all core turbo 24/7 under stock frequencies and are not possible to cool to maintain them?

So far, SL-X core 10 core thermals/consumption is pretty strong from a couple reviews I've seen. Depending on clocks, it will probably get a bit worse with HCC's.

IIRC, Xeon's are running lower clocks than Skylake-X. If that's the case, you can't simply go by Xeon consumption and thermals and assume the same for SL-X.

For instance on Intel's site, looking at 10 core SL-X the clocks are 3.3 to 4.3 Ghz. Xeon Gold 5115 10 core clocks are 2.4-3.2 Ghz.

Either way, I will simply wait for reviews to see how things go.

 

[formulav8]

It's been real quiet about this for SKL-X. I doubt they will though.

Ahh ok, thanks for the info. Is there a physical reason that would keep them from wanting to solder?

 

[TheF34RChannel]

Ahh ok, thanks for the info. Is there a physical reason that would keep them from wanting to solder?

None that I can think of if I'm honest.

 

[Arachnotronic]

None that I can think of if I'm honest.

Lifetime reliability.

http://overclocking.guide/the-truth-about-cpu-soldering/

 

[Bouowmx]

As an alternative to Windows power management, I use ThrottleStop to control Intel Speed Shift Energy-Performance Preference (EPP). Range is 0-255 (default 128), 0 is for constant maximum all-core Turbo frequency, and 255 is for constant minimum frequency (0.8 GHz on Core i5-7200U).

Even enabling Speed Shift and keeping default EPP 128 makes a significantly more responsive processor than Windows Balanced power plan.

 

[dullard]

It's very rough dullard.

52% less power equals 0.48x. Adding 2 more cores to 4 is 1.5x. 1.5 x 0.48 = 0.72. So you see such simplistic calculations do not work.

You also cannot relate amount of cores and clock speeds. 10% more cores does not mean 10% difference in TDP, because other factors come into play.

-Non-core takes power
-Binning
-Market positioning. Server chips have lower Turbo than SKL-X chips. Simply because consumer workloads REQUIRE high clocks

Really, I will say the same thing I always do. Wait for the release. You'll never accurately guess what they will release. And that's for everyone.

That was covered already. They can go 52% less power OR 26% more speed. Yes, if they only went for less power, you are right, 1 does not equal 0.72. I apologize for skipping what I thought was extremely obvious and going right to the answer. Here is the rest:

But, Intel is highly unlikely to only go for less power. So, 52% is too high. It will range anywhere from 1.5*0.48 = 0.72 to 1.5*1.0 = 1.5. Intel tries for the sweet spot, which doesn't move with more cores. Thus, the sweet spot is pretty close to the center point of that 0.72 to 1.5 range. Intel has already claimed that they were going for a 15% performance boost. Which according to the graph that I linked gives a 35% efficiency boost. 1.5*0.65 = 0.975. That is close enough for a rough estimate that Coffee Lake will be very much like Skylake but add two cores and maybe 15% faster (SpecInt). It'll all work out to be very close to the rough numbers that I posted (give or take a small clock speed difference).

 

[StefanR5R]

Is there a physical reason that would keep them from wanting to solder?

Lifetime reliability.

http://overclocking.guide/the-truth-about-cpu-soldering/

Right, because below-ambient cooling is the norm now. /s

 

[IEC]

Ahh ok, thanks for the info. Is there a physical reason that would keep them from wanting to solder?

A small $ savings amplified by a bigger $$$ savings due to the occasional killed chip during solder process, and occasional defective solder leading to problems down the road. When you have huge monolithic dies that are expensive to produce, soldering losses are not inconsiderable. When you have small dies MCM'd together, soldering losses are inconsequential...

As far as the "reliability" argument goes, that only matters with rapid swings in temperature (der8auer uses figures of cycles from -55C to +125C...) - there are soldered chips in applications that have far less variance in temps (read: air cooled) that have been operational for longer than a decade. Getting IHS soldering done correctly and consistently simply costs more money than Intel is willing to spend for mostly marginal gains from the end user perspective, and significant losses from the bean counter perspective.

 

[formulav8]

http://overclocking.guide/the-truth-about-cpu-soldering/

If i'm understanding the article correctly, he did the soldering himself and not factory. It also seems to be his first time using Indium. And it looks like it failed using LN2 not typical cooling methods? Again, if i'm understanding the article properly.

 

[dullard]

Right, because below-ambient cooling is the norm now. /s

It has nothing to do with below-ambient cooling. It has everything to do with die size (large chips with more solder surface area in times past could handle stresses more) and temperature cycling (how frequently, by how much, in what period of time). The temperature cycling does not have to go below ambient to cause problems.

 

[dullard]

If i'm understanding the article correctly, he did the soldering himself and not factory. It also seems to be his first time using Indium. And it looks like it failed using LN2 not typical cooling methods? Again, if i'm understanding the article properly.

Solder joints fail with temperature cycles. There are international standards for testing solder joints
https://www.nts.com/services/environmental/solder-joint-reliability

It has nothing to do with his soldering skills or cooling methods. Solder of different metals will fail eventually. Larger temperature gradients (such as today's modern chips that heat up very quickly to high temperatures) and small solder surface areas (such as a tiny modern CPU with few cores) magnify the problem.

 

[StefanR5R]

It has nothing to do with below-ambient cooling. It has everything to do with die size (large chips with more solder surface area in times past could handle stresses more) and temperature cycling (how frequently, by how much, in what period of time). The temperature cycling does not have to go below ambient to cause problems.

Please elaborate on the die size or/ and design life expectancy where this becomes an issue under ambient cooling.

Solder of different metals will fail eventually.

Interfaces made of polymer paste will fail eventually.