• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

Intel Skylake / Kaby Lake

Page 50 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
The dies will be much smaller which would easily counter inflation. A 110 mm^2 skylake die is barely bigger than a high end cell phone chip (estimate 80 mm^2 on 14 nm) which will cost 1/5 the price (i7 pricing) and those ARM companies pay the TSMC tax.
Intel claim their 14nm $/transistor is lower than for 22nm, but at the same time $/mm2 has increased, see here.
 
Intel claim their 14nm $/transistor is lower than for 22nm, but at the same time $/mm2 has increased, see here.

True. But I'm looking at the $/transistor. And considering the transistor budget for intel's chips has barely budged since SB intel is definitely pulling ahead.

22 -> 14 nm is a large drop in $/transistor while the transistor budget is barely going to change (maybe 10-20% more transistors).

32 nm SB - 1.16 B xtors
22 nm IVB - ~1.4 B xtors
22 nm HW - ~ 1.4 B xtors
14 nm SKL - ~ 1.6-1.8 B xtors

Meanwhile using intel's charts $/xtor has dropped by nearly 3x.
 
I think the important part is to look at volume.

The same, if not shrinking volume have to fuel much higher R&D.
TR4FyjV.png
 
I'm eager to price out my skylake upgrade (from nehalem, i7-920..) When can we expect motherboard information? I'm looking for a decent, but cheap micro-ATX one
 
Afaik there is official support for Windows 7/8.1/10. Just watch some system drivers who already support Skylake (like GPU drivers). There is it.
 
The only thing I have seen about this has to do with installing the OS from a USB drive.

Oh, I read that is even more than that...
http://wccftech.com/intel-skylake-remove-support-usb-based-windows-7-installation-platform-specs/

Seems that MS wants to kill Win7
 
Oh, I read that is even more than that...
http://wccftech.com/intel-skylake-remove-support-usb-based-windows-7-installation-platform-specs/

Seems that MS wants to kill Win7

Reading wccftech was your first mistake. Not using common sense the second.

Windows 7 isnt officially supported because Its out of support and sales from Microsoft. But you can still run Windows 7, Vista, XP, 2000 etc on Skylake. Leaks are run on Windows 7 as well.

And still USB 2.0 on Skylake.
Skylake-S_specs.jpg

Intel-100-Series-Chipsets-SKUs.png
 
Last edited:
I think Intel keeps lying about their cost reduction advantage past beyond 22nm ...

How did thousands upon thousands of scientists fail to reduce masking costs whereas the minds behind Intel succeeded ?

It's also not like their using cutting edge photolithographic technology either like EUV to gain an upper hand against other IDMs ...

Intel may have high R&D funds but it's no use in this case when there is no immediate advantage to be had with it ...
 
I think Intel keeps lying about their cost reduction advantage past beyond 22nm ...

How did thousands upon thousands of scientists fail to reduce masking costs whereas the minds behind Intel succeeded ?

It's also not like their using cutting edge photolithographic technology either like EUV to gain an upper hand against other IDMs ...

Intel may have high R&D funds but it's no use in this case when there is no immediate advantage to be had with it ...

Its about design cost if you followed the node dicussion. If you come with a 150M$ design its not going to happen. The barrier seems to be around 500M$ for modems and 1000M$ for SoC/CPUs. Each require about 10x more of that in revenue to pay themselves.

http://electroiq.com/petes-posts/20...long-design-cycles-may-delay-20nm-and-beyond/

Handel said the gate utilization is an issue because of limitations of the design tools and parasitic effects. “The other factor is parametric yields, which are strictly tied into leakage control for the 20nm and of course for the 16nm FinFETs,” he said. “You can break this. Intel has shown that it can be broken and of course that’s an excellent achievement. But, it’s based on very high design costs, potentially $1 billion per design, so you need $10 billion in revenue. It also takes a number of years,” he said. He noted that, in the smartphone market, designs move very fast. “You can’t make that kind of investments in designs.”
 
Last edited:
Its about design cost if you followed the node dicussion. If you come with a 150M$ design its not going to happen. The barrier seems to be around 500M$ for modems and 1000M$ for SoC/CPUs. Each require about 10x more of that in revenue to pay themselves.

http://electroiq.com/petes-posts/20...long-design-cycles-may-delay-20nm-and-beyond/

Pretty sure I was following the transistor/price argument and so was Intel ...

Even Intel knows they won't be able to reduce design costs so my question remains how are they doing this ...

intel_semiconductor_reduction_cost_chip_manufacturing1-635x323.png
 
Pretty sure I was following the transistor/price argument and so was Intel ...

Even Intel knows they won't be able to reduce design costs so my question remains how are they doing this ...

intel_semiconductor_reduction_cost_chip_manufacturing1-635x323.png

Because they are only including manufacturing costs in the graphs and not adding design costs. So, these are, as usual, mainly 'marketing' slides.
 
Last edited:
Because they are only including manufacturing costs in the graphs and not adding design costs. So, these are, as usually, mainly 'marketing' slides.

Design costs can be amortized but what can't are manufacturing costs so how in the world are they able to reduce latter when everyone else are having issues ?

In fact if they are able to reduce manufacturing costs to that degree then why is Intel so hesitant on spitting out tons of 14nm chips when it should cancel out the increased design costs ?
 
Design costs can be amortized but what can't are manufacturing costs so how in the world are they able to reduce latter when everyone else are having issues ?

In fact if they are able to reduce manufacturing costs to that degree then why is Intel so hesitant on spitting out tons of 14nm chips when it should cancel out the increased design costs ?

When you got a volume/revenue like Intel. When you got time and R&D for it. Then you can make it cheaper. Its described in the article I linked. Rememebr Intel sits on something like 2/3rds of ALL semiconductor revenue.

The regular companies could do the same to and with 28nm. But then came multipatterning along...

At some point Intel wont get cheaper transistors either.
 
Last edited:
Design costs can be amortized but what can't are manufacturing costs so how in the world are they able to reduce latter when everyone else are having issues ?

In fact if they are able to reduce manufacturing costs to that degree then why is Intel so hesitant on spitting out tons of 14nm chips when it should cancel out the increased design costs ?

Those cost/transistor charts are normalized for yield. If your yields aren't like-for-like, then the cost/transistor comparisons are worthless.
 
Wait, that could mean that the cost of the processors might be higher than expected?
Ok, seems that the silicon era is on the beginning of its end.

BTW, I am wondering when the Core i3 might get released...
 
I Remember something I read...
Isn't supposed Skylake being not compatible to Windows 7 and maybe Windows 8 too?

I think you may be talking about this:

Intel Skylake Removes Support for USB based Windows 7 Installation – Major Platform Specs Confirmed

It's 5 months old but I just came across it recently.

We have a pretty huge leak today with lots of new details on Intel’s upcoming Skylake processors. To begin with, Microsoft is removing support for the EHCI host controller (USB 2.0 spec) and keeping only the xHCI host controller spec (also known as the universal USB 3.0 specification). While the USB 3.0 spec is backward compatible with most USB 2.0 and 1.0 functions, installing windows 7 via USB will not be one of them (source: EXPReview).
 
Thats proven false.

The Skylake AIO example since USB HS is EHCI. In case the supplied edvidence wasnt overwhelming enough already.

skylake_PCHIO.JPG
 
When you got a volume/revenue like Intel. When you got time and R&D for it. Then you can make it cheaper. Its described in the article I linked. Rememebr Intel sits on something like 2/3rds of ALL semiconductor revenue.

The regular companies could do the same to and with 28nm. But then came multipatterning along...

At some point Intel wont get cheaper transistors either.

Yes but why believe now that Intel still has a cost per transistor advantage at 14nm ?
 
Back
Top