BACKGROUND
Integrated circuits include various circuit components that are integrated into a piece of semiconductor material, or “die,” which may be encapsulated within and secured to a package. Integrated circuit packaging technology has been evolving and now requires increasingly smaller packages as the demand for greater function and smaller sized electronics increases. A package may include one or more dies, electrically connected to one another. Packages having more than one die are multi-chip modules (MCMs). Dies within an MCM may be positioned in a horizontal or vertical relationship with one another, or both, and electrical connections run between the dies within the MCM. The combination of the vertical and horizontal circuit connection capabilities saves valuable space on the package and results in greater functionality in less space.
Each die in an integrated circuit package requires a certain amount of power to function properly. Required voltage rails are typically delivered to each individual die by a voltage regulator. With the increasing number of dies in multi-stacked chip configurations, a greater number of voltage regulators are required. Oftentimes, different dies within an MCM require different operation voltages. Voltage regulators regulate the voltage, and thus the power that is distributed to the various die layers in a multi-stacked package. Voltage regulators tend to be physically large and take up large area. Many techniques have been developed to accommodate for this issue, such as including the voltage regulator on a circuit board that supports the package or into the package itself. These options limit speeds for the function of the components on the die because of the physical distance between the electronic components and the voltage regulator. Further, regulators that include on package inductors require additional space on the package. Having multiple inductors on package might not be possible in many cases due to area constraints.
Thus, there remains a need for improved voltage regulation architectures for three-dimensional integrated circuit packages.
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