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  • Community Question: What makes a good motherboard?

Intel Skylake / Kaby Lake

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Topweasel

Diamond Member
Oct 19, 2000
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Ring Bus for off-die communications? I don't know how that would work.

I'd think EMIB for consumers will be just to connect cores with the other parts. For example, you'd have 8 cores with memory controller in one die, and you'd have a beefy GPU in the other. 8 cores would be small on 10nm.

It'd still be cheaper for them to not use EMIB at all and fit everything in one die because consumer space is very price sensitive. I mean, for GT2 die they can do that with everything on one die rather than EMIB.
I guess my point was that Dell would A.) Be designing 6 core consumer dies as we speak using ringbus. Thos 6 core dies would have internal latency comparable to current 7700's and the inter-CCX communication on Zen. B.) It would be too late to increase core count in the next 3 years. Any change they make in any dies now could hold them up to be as long as starting a new design now and rolling it when it's ready and would incur a long delay between product lines at some point (look what it did to AMD when they did that).

So my running theory is that they would if they felt the need to compete with AMD on core count in the next year or so start to emib staple their dies together. That way they still can keep their Pentium-i5 lineups, not have to use a server die for consumers. In the mid term (2-3 years) they may even use this method to get around LCC and MCC dies (probably not a good solution for the HCC stuff). This assumes that they feel pressured to make a move which can be debateable.
 

IntelUser2000

Elite Member
Oct 14, 2003
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Expanding on the Crystalwell-like derivative using EMIB.

Crystalwell, better known as eDRAM equipped parts, uses a traditional multi-chip packaging. While it saves cost and reduces complexity compared to an interposer equipped part, it has limitations in bandwidth. Intel needed to create a purpose-specific connection between the eDRAM and the main chip.

With an interposer, that is not needed. EMIB will still raise the costs over traditional MCP, but bring the benefit of massively increased bandwidth.
 

IntelUser2000

Elite Member
Oct 14, 2003
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I guess my point was that Dell would A.) Be designing 6 core consumer dies as we speak using ringbus.
Earlier leaks indicated that original Cannonlake was a chip with 8 cores and integrated graphics. I'd think because of an inherent advantage of having everything integrated, they'd fare ok with 12-core AMD parts, not too different from today. But because starting with 6 cores, we reach a point where being fully taking advantage of all the cores are increasingly being a niche. So while we see a big difference going above 4, not so going above 8. Besides, many cores should be HEDT's job.

So my running theory is that they would if they felt the need to compete with AMD on core count in the next year or so start to emib staple their dies together.
I still have to wonder how this is going to end up. Manufacturers do this because they absolutely have no room in the Perf/Clock and clock speed area. That doesn't make having no applications to take advantage of the extra cores situation better. Soon, it'll be bad as the smartphones that use 12 cores.

If its possible I'd like them make a lower pipelined chip that reduces clock speed by 33% but perf/clock improves 50%. Wishful thinking probably.

Or I wish they'd get to this "vision" soon: http://www.anandtech.com/show/2471

Considering that Apple's low power chips are on the level of Intel's best, I'd consider their Core chips to be a medium-core chip and we're due for a large-core chip with a setup similar to third pic.

That way they still can keep their Pentium-i5 lineups, not have to use a server die for consumers. In the mid term (2-3 years) they may even use this method to get around LCC and MCC dies (probably not a good solution for the HCC stuff). This assumes that they feel pressured to make a move which can be debatable.
They were talking about EMIB coming to server, maybe first, and also the latest process. The reason for EMIB was to accommodate for the bleeding edge process not being able to use the largest die right away. The biggest dies are the largest core count ones. Perhaps they would go from 28 core single die Skylake to 2x 24 core Icelake.
 

LTC8K6

Lifer
Mar 10, 2004
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You don't need to guess Intel Core i9-7980XE specs; it already exists as the Xeon Gold 6150: 2.7-3.4-3.7 GHz base-all-core-max frequency, 165 W.
Why choose that one, though? There is an 18C Gold 6134 that is 3.2/3.7 and 130W. And others. How can you tell which one would be the 7980XE?

EDIT: Okay, none of the data on the "metal" Xeons seems to be confirmed, so we really can't tell about the 6150 or the 6134. The data could easily be incorrect as to cores and TDP.
 
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Sweepr

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kush120

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Mar 16, 2017
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You know thats not really fair to compare launch scalp prices.
X390 board retailed at 699.99 @ some places.
And if you wanna get real technical... you cant even buy a RX 580 now without paying 1080ti prices, and well we know which is a better value unless your a coin miner.
They are pretty damn expensive, and most look like MSRP

http://wccftech.com/intel-skylake-x-kaby-lake-x-cpus-x299-motherboards-pre-order-prices/

They are all very very expensive compared to x370 boards. Maybe TR mobos will also be that expensive too, but the cost of CPU/MOBO looks like it will favor AMD heavily. The mobo price is usually not factored in but if you have to pay $400 for a decent mobo that should also be considered in total platform cost.
 

Bouowmx

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Nov 13, 2016
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AMD X370 is better compared to Intel Z[12]70: 2-channel memory, 4 DIMMs, 16 PCI Express lanes, lane splitting for 2 GPUs directly connected to CPU.

AMD X399: looks like pretty much the same thing as Intel X299: 4-channel memory, 8 DIMMs, many PCI Express lanes. So, I expect similar cost,; maybe the minimum is a bit lower (~200 USD), and fewer ultra-expensive models (~500 USD) available.

I went a bit confused on the part of "400 USD for a decent motherboard".

I noticed all Intel X299 motherboards currently for Newegg pre-order don't want you to use 4 two-slot GPUs, and all currently known AMD X399 ones do :confused_old:.

EDIT: on further reading of specs, Intel X299 'weird' PCI Express slot placement probably because of the 3 different configurations (44, 28, 16) motherboards have (?) to support?
 
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jpiniero

Diamond Member
Oct 1, 2010
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so why hasn't Intel released the Xeon versions yet? (LGA 3647)
It's been available for some time; just not outside of the cloud guys. But yeah I am a little surprised they haven't formally announced the lineup yet.

Expanding on the Crystalwell-like derivative using EMIB.
There was that Geekbench leak that Intel was testing fused-in LPDDR4X with Icelake that broke the memory latency test. Don't need edram if the system memory is that fast.
 

DrMrLordX

Lifer
Apr 27, 2000
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Socket R4 boards are compatible with all new X-series CPUs.
Power draw figures would seem to disagree with that. Unless there are boards out there with "overbuilt" sockets that go beyond spec, much like some of the better FM2+ boards out there.
 

Ajay

Diamond Member
Jan 8, 2001
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There was that Geekbench leak that Intel was testing fused-in LPDDR4X with Icelake that broke the memory latency test. Don't need edram if the system memory is that fast.
That would make an interesting laptop!
 
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imported_ats

Senior member
Mar 21, 2008
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I guess my point was that Dell would A.) Be designing 6 core consumer dies as we speak using ringbus. Thos 6 core dies would have internal latency comparable to current 7700's and the inter-CCX communication on Zen. B.) It would be too late to increase core count in the next 3 years. Any change they make in any dies now could hold them up to be as long as starting a new design now and rolling it when it's ready and would incur a long delay between product lines at some point (look what it did to AMD when they did that).
Um, you've got things 100% backwards. Adding cores, esp with the ring bus is simple, quick and easy. Adding die to die communication via EMIB or any other MCM solution takes significant planning and time.
 

Topweasel

Diamond Member
Oct 19, 2000
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Um, you've got things 100% backwards. Adding cores, esp with the ring bus is simple, quick and easy. Adding die to die communication via EMIB or any other MCM solution takes significant planning and time.
New silicon takes much more time than MCM or EMIB does. Both the P4 and C2Q we're reactionary MCM solutions. You can come up with an MCM solution in a year. You have at least 2 year reset on any development if make major changes to silicon.

Side comment to anyone else. Does anyone know why Taptalk still shows ignored users?
 

Sweepr

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May 12, 2006
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PurePC published their Core i9-7900X review and compared gaming performance using DDR4-2133 vs DDR4-3200. Games like The Witcher 3, Total War: Warhammer, Fallout 4 saw a >10% boost. Ps: Reviews list updated (page 501).
 
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jpiniero

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Oct 1, 2010
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PurePC published their Core i9-7900X review and compared gaming performance using DDR4-2133 vs DDR4-3200. Games like The Witcher 3, Total War: Warhammer, Fallout 4 saw a >10% boost. Ps: Reviews list updated (page 501).
Still losing to Broadwell-E in several games, even with faster memory and higher stock clock speeds.
 

Carfax83

Diamond Member
Nov 1, 2010
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Still losing to Broadwell-E in several games, even with faster memory and higher stock clock speeds.
I wonder how much of that is due to immature BIOSs? I remember a tweet from Hardwarecanucks' editor saying that newly released BIOSs had significantly increased performance, and that he would have to redo his tests.

Regardless, I'm glad I decided to hold off on Skylake-X and wait for the die shrink.
 

caswow

Senior member
Sep 18, 2013
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i mean come on we should not kid ourselves. these cpus are no ryzen new type of cpus. intel had years of time to complete the development of them and people even said they had them in their drawer ready to be "taken out" for amd. and people STILL after all these bios updates claim ryzen platform has ram issues? come on please. this is intel what immature bios do we talk about?
 

jpiniero

Diamond Member
Oct 1, 2010
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I would say maybe on BIOSes improving the performance by a notable percent but we will have to see.

i mean come on we should not kid ourselves. these cpus are no ryzen new type of cpus. intel had years of time to complete the development of them and people even said they had them in their drawer ready to be "taken out" for amd. and people STILL after all these bios updates claim ryzen platform has ram issues? come on please. this is intel what immature bios do we talk about?
Well, it is going to be released 3 months before it was supposed to.
 

Eddward

Member
Apr 10, 2012
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I wonder how much of that is due to immature BIOSs? I remember a tweet from Hardwarecanucks' editor saying that newly released BIOSs had significantly increased performance, and that he would have to redo his tests.

Regardless, I'm glad I decided to hold off on Skylake-X and wait for the die shrink.
What die shrink? I believe there is not going to be any die shrink for Skylake-X. Next HEDT platform is probably just a 14nm refresh Cascade Lake (like Kaby Lake after Skylake) and after that is a new architecture Ice Lake-SP which will be out not sooner than mid 2019.
 

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