Well to keep your analogy going and be fair, anyone with a brain will be able to pay $2.00 for the 100ghz model and easily OC it to above the speeds of the stock $2000 chip.
Well to keep your analogy going and be fair, anyone with a brain will be able to pay $2.00 for the 100ghz model and easily OC it to above the speeds of the stock $2000 chip.
TuxDave
Lifer
- Oct 8, 2002
- 10,572
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The average peon doesn't really care about process technology so it's not a good marketing role for them. For the more tech saavy, there's always more opportunities for market the process besides the "process node label". Look how much "High K Metal Gate" was tossed around in all the ads. I think that we'll see more emphasis on other aspects of the technology when the actual process size stop decreasing. They might even give it a nice marketing term and have charts going 'With Intel speedboost Transistors you can get 400% more battery life!"
- Sep 28, 2005
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Hey IDC dont we need to change to lith in order to migrate to 22nm?
I remember current tech wont allow us to go that far, so intel was thinking of a new fab process entirely... I THINK.
But also I THINK i remember u telling us that 22nm was impossible with current fab process no?
To be honest im laughing at this road map.
I remember current tech wont allow us to go that far, so intel was thinking of a new fab process entirely... I THINK.
But also I THINK i remember u telling us that 22nm was impossible with current fab process no?
To be honest im laughing at this road map.
You are thinking of EUV, but current thinking is that it won't be necessary (or manufacturing ready) for 22nm (see links in the posts in that EUV link).
Earliest intro timeline for production is 16nm at the moment.
Bear in mind though that this means EUV needs to be "ready enough" to be capable of supporting 16nm process development teams in about 4 months time.
Current fab tech is capable of 22nm, provided we require current fab tech to include high-NA immersion litho combined with dual-patterning integration
But 22nm won't require anything more exotic materials-wise than an evolutionary iteration of planar HK/MG and ULK/Cu used for 32nm. We might see Cu contacts come into play at 22nm (dual-damascene M1).
All the exotic 3D stuff (mugfet, finfet, etc) won't be on the table any sooner than 16nm. eDRAM will likely be there though.
Earliest intro timeline for production is 16nm at the moment.
Bear in mind though that this means EUV needs to be "ready enough" to be capable of supporting 16nm process development teams in about 4 months time.
Current fab tech is capable of 22nm, provided we require current fab tech to include high-NA immersion litho combined with dual-patterning integration
But 22nm won't require anything more exotic materials-wise than an evolutionary iteration of planar HK/MG and ULK/Cu used for 32nm. We might see Cu contacts come into play at 22nm (dual-damascene M1).All the exotic 3D stuff (mugfet, finfet, etc) won't be on the table any sooner than 16nm. eDRAM will likely be there though.
Nemesis 1
Lifer
- Dec 30, 2006
- 11,366
- 2
- 0
Originally posted by: Idontcare
You are thinking of EUV, but current thinking is that it won't be necessary (or manufacturing ready) for 22nm (see links in the posts in that EUV link).
Earliest intro timeline for production is 16nm at the moment.
Bear in mind though that this means EUV needs to be "ready enough" to be capable of supporting 16nm process development teams in about 4 months time.
Current fab tech is capable of 22nm, provided we require current fab tech to include high-NA immersion litho combined with dual-patterning integration
All the exotic 3D stuff (mugfet, finfet, etc) won't be on the table any sooner than 16nm. eDRAM will likely be there though.
Didn't Intel mention Finfet in recent article @ 22.Than they used another term I had never heard befor. It was not 3D . I just can't recall the term used. Finfet is already in use is it not?
TuxDave
Lifer
- Oct 8, 2002
- 10,572
- 3
- 71
Originally posted by: Nemesis 1
Originally posted by: Idontcare
You are thinking of EUV, but current thinking is that it won't be necessary (or manufacturing ready) for 22nm (see links in the posts in that EUV link).
Earliest intro timeline for production is 16nm at the moment.
Bear in mind though that this means EUV needs to be "ready enough" to be capable of supporting 16nm process development teams in about 4 months time.
Current fab tech is capable of 22nm, provided we require current fab tech to include high-NA immersion litho combined with dual-patterning integration
All the exotic 3D stuff (mugfet, finfet, etc) won't be on the table any sooner than 16nm. eDRAM will likely be there though.
Didn't Intel mention Finfet in recent article @ 22.Than they used another term I had never heard befor. It was not 3D . I just can't recall the term used. Finfet is already in use is it not?
Trigate? That's Intel's thing where you take a finfet and add the gate to the top of the non-planar transistor (in addition to the two on the sides making it a gate on 3 sides of the channel) I'm actually interested to see if anyone has a Finfet in a product and how well it has worked for them. It was a big deal back when it was invented back in my University but I never worked with them enough to see the realized gain with a commercial product.
Originally posted by: Nemesis 1
Originally posted by: Idontcare
You are thinking of EUV, but current thinking is that it won't be necessary (or manufacturing ready) for 22nm (see links in the posts in that EUV link).
Earliest intro timeline for production is 16nm at the moment.
Bear in mind though that this means EUV needs to be "ready enough" to be capable of supporting 16nm process development teams in about 4 months time.
Current fab tech is capable of 22nm, provided we require current fab tech to include high-NA immersion litho combined with dual-patterning integration
All the exotic 3D stuff (mugfet, finfet, etc) won't be on the table any sooner than 16nm. eDRAM will likely be there though.
Didn't Intel mention Finfet in recent article @ 22.Than they used another term I had never heard befor. It was not 3D . I just can't recall the term used. Finfet is already in use is it not?
Yeah you are thinking tri-gate. There is a bevy of competing acronyms and names for non-planar xtor technology.
Finfet is not in production use. Multiple demonstrations of individual xtor performance metrics have been demonstrated, same that can be said for CNT (carbon nanotube) xtors and graphene.
What you saw for 22nm was a feasibility report on the risk-to-production timeline of introducing tri-gate, not a report on the necessity of introducing trigate. I remember the report as we discussed its implications here in a thread a while back.
Remember these things aren't about "performance at any cost", the preliminary homework must be done (Intel calls it pathfinding) to generate the data needed for the costs-benefit analysis including risks to implementation on a manufacturing timeline.
That said, if anyone has the resources to make that risk to the timeline negligibly small at 22nm it would be Intel. But AMD really needs a process technology miracle so I would not at all be surprised if GF's debuts some flavor of finfet/tri-gate before Intel simply for the sake that not taking the risk presents an even greater risk.
I've seen them in test chips (well I've seen the wafers with the test chips and inspected the Finfets under SEM, you know what I mean) but not in an actual IC device designed for sale or use outside of testchip purposes. To put it mildly they are a bitch to keep from breaking while attempting to do the processes on them that are necessary to keep the defect density low enough as to make trillions of them functional for yielding a sellable chip. Has not made the jump from academics to manufacturing world yet.
Nemesis 1
Lifer
- Dec 30, 2006
- 11,366
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- 0
Na I new Tri gate . Thats what I call 3D gates. Intels Still thinking Bulk @22 with Finfet or Tri gate . But This was another term that was used. Made me think of 4 gates . I know Tri gates is giving fits because of it shape. So 4 gates Should solve the odd shape problem . But planar finfit be the smart safe move also the move to SOI along with FINfet would be smartest move also . Even tho the differance between Bulk and SOI is now down to 28% now I believe
That isn't really a lie.
http://optics.org/cws/article/research/24856
Also, even if the molecules are synthesized, the whole inspiration for the structures of those light emitting molecules comes from structures found in living electroluminescent beings. Besides compounds with hydro-carbon chains are called organic compounds if even synthesized in a lab. The lay man might think it was harvested from a rare plant in the amazonian jungle but that's his problem.
Yeah we don't care what the number is as long as it is smaller and the chip runs faster/uses less power/allows for better architecture. 22nm means nothing to me per se.
I guarantee Intel has already downselected their decision for xtor architecture at 22nm. There is no "thinking" about that at this stage in the timeline. 16nm is still in such a decision stage though.
Well you are either thinking of gate all around fet which is a 3D xtor design with 4 gates or you are thinking of planar double gate which is a 2D xtor design with 2 gates.
The term "planar finfet" doesn't make much sense...the "fin" in finfet requires a third dimension to the channel. You will hear of references to planar finfet patterning (NSFE warning: this is a patent link) but the emphasis there is on making the device planar for patterning purposes at each patterning step, i.e. they fill in the spaces around the finfet with sacrificial dielectric material prior to attempting to do subsequent patterning on it. This doesn't make the finfet planar, it makes the wafer surface planar, a necessity for maintaining patterning integrity and robustness.
Now you can fabricate a finfet design which involves what is called a buried finfet (NSFE warning: this is a patent link). It is still a 3D xtor design in that the channel is not planar but the fin is "buried" in the plane-view of the silicon surface of the wafer.
During processing though it is still very much a 3D fin structure, just as STI (shallow trench isolation) and gates are 3D features until they reach the point in the process flow where they are covered over with dielectric layers in subsequent depositions.
taltamir
Lifer
- Mar 21, 2004
- 13,576
- 6
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while they might be based on molecules found in nature, the reason the quality is better is because there is no polarization process, and no need for a backlight (aka, each pixel emits its own light), it has nothing to do with them being "natural". And while there is no physical difference between a molecule produced by an animal and identical one produced in a factory, the factory one is certainly not "natural". (not that it matters)
besides all that, the article you linked simple says that the found out DNA has useful electron transport properties, so they harvest it from salmon semen and spin it into the OLED device. The salmon DNA is not the OLED, but an electricity moving device, aka, wires.
^^^ I think this is just a question of semantics. To the lay person "organic" means something about food not having pesticides or coming from a natural source. For a student of science organic simply means a molecule that has carbon atoms in rings or chains where other atoms like oxygen, hydrogen, nitrogen etc. are attached.
So gasoline is organic, as is mineral oil, as is DDT or isoamyl acetate (the chemically synthesized "banana flavor" in processed food) or pretty much any drug on the market.
So other than the lay person, nobody is going to confuse the real definition of organic compound with Kashi cereal.
So gasoline is organic, as is mineral oil, as is DDT or isoamyl acetate (the chemically synthesized "banana flavor" in processed food) or pretty much any drug on the market.
So other than the lay person, nobody is going to confuse the real definition of organic compound with Kashi cereal.
I am quite sure this is not true, the panrls are aften refferred to as "LED Backlit" and the problem they had with the original LED Macbook Pro shows how the LED is simply a back light. Don't have time to find links, gotta get to work.
taltamir
Lifer
- Mar 21, 2004
- 13,576
- 6
- 76
LED backlit are LCD + LED backlight.
OLED is a completely different technology.
http://en.wikipedia.org/wiki/LED_LCD#LED_backlights
http://en.wikipedia.org/wiki/OLED
Roger, thanks. OLED is better than I thought, I had assumed it was just a another variation on LCD (obviously).
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