Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[9949asd]

Intel's Future Depends on 4 things 18A PTL Clearwater Forest and Falcon shores in 25

Intel better have x3d like cpu in near future, otherwise it will be doom on the gaming performance.

 

[511]

Skymont 8.94

https://twitter.com/x/status/1849849727959097789

 

[cannedlake240]

Skymont 8.94

https://twitter.com/x/status/1849849727959097789

View attachment 110288

15% PPC uplift over 13900K Gracemont. Maybe with lower latency L3 and memory it could've been closer to 20%

 

[AcrosTinus]

I might be coping but this generation is a reset and I will give Intel the benefit of the doubt and believe them.
Hopefully this will turn out like Zen1 and lead to significantly better products in the future.
I bought ARL because I will tune it and it will be as fast or faster than my sold 12900K and 13700K but with more than 50% more MT performance.

I hopfe for Intel's sake that Patherlake or whatever is an iteration that takes the input from the market into account.

 

[gdansk]

I might be coping but this generation is a reset and I will give Intel the benefit of the doubt and believe them.
Hopefully this will turn out like Zen1 and lead to significantly better products in the future.
I bought ARL because I will tune it and it will be as fast or faster than my sold 12900K and 13700K but with more than 50% more MT performance.

I hopfe for Intel's sake Patherlake or whatever is a iteration that take the input from the market into account.

What's like a reset about this? It's just refinements of Meteor Lake...

 

[adroc_thurston]

but this generation is a reset

A reset is whenever Unified Core comes (late 2020s).

 

[511]

I might be coping but this generation is a reset and I will give Intel the benefit of the doubt and believe them.
Hopefully this will turn out like Zen1 and lead to significantly better products in the future.
I bought ARL because I will tune it and it will be as fast or faster than my sold 12900K and 13700K but with more than 50% more MT performance.

I hopfe for Intel's sake Patherlake or whatever is a iteration that take the input from the market into account.

Nope it is a disaster a Mobile Product forced on Desktops

 

[RTX2080]

I guess a fair comparison point for Arrowlake would be Meteorlake then, not Raptorlake. But I can't imagine that Arrowlake doesn't have any improvements in its tile based design. What made Intel call off Meteorlake's launch on desktop, but proceed to not sufficiently improve the successor for a desktop launch either?

What memory/latency tests do you see ARL specifically not looking good that would cause the low scores we are seeing in these memory sensitive applications?

David huang did SPECint on ARL and said L3 latency is the most to blame which has already been there in Meteorlake as well, and from my knowledge it's also be a root cause of poor performance in gaming and latency sensitive applications. I would assume that high L3/memory latency are the characteristic of this design.

From his test 265k SPECint is a bit slower than 13900k from previous data which might indicate having similar issue like being in Meteorlake and already cause IPC regression on RedwoodCove.

https://twitter.com/x/status/1849844905587376265

If that's the case there would be nothing to be 'fix' in the future just like Meteorlake.

 

[SiliconFly]

.

 

[511]

Apparently, some Twitter/X users seem to have nailed the issue. Looks like scheduling which eventually leads to latency due to inadvertent E core scheduling.

https://twitter.com/x/status/1849844828789502360

https://twitter.com/x/status/1849852583608975695

https://x.com/CapFrameX/status/1849138027005718775

The huge mess continues... I thought "wait what if its VBS causing issues", turns out memory integrity was disabled by default.

Enabling it boosted performance further... I'm just gonna shut it off for the day and go get something to eat. 😂

x.com

x.com

 

[Hulk]

Anand was wrong. There are bad products. PSU's that catch fire. "Deathstar" HDD's. More recently, 7800X3D's that went up in smoke, or degrading RPL.

There is the implied cavaet that the product actually works and doesn't blow up. Anand was never wrong!

 

[OneEng2]

It's 2026H2. Or later. It can always be later.

AMD confirms Zen 6 and Zen 6c will arrive in 2025 — but Intel is set to grab the fastest CPU server spot for the first time in a decade within weeks

Intel's 128 P-core Granite Rapids-AP line is coming soon

www.techradar.com

I checked a few sources. Even the most pessimistic are estimating launch in late 2025 with production in Jan 2026. Most are saying mid 2025. Do you have a source on the 2026 H2 or later?

H2 2025 aligns with TSMC's N2 process release as well:

TSMC on track to begin 2nm chip production in 2025 - Electronics Manufacturing News

Source: FocusTaiwan

www.globalsmt.net

 

[Saylick]

AMD confirms Zen 6 and Zen 6c will arrive in 2025 — but Intel is set to grab the fastest CPU server spot for the first time in a decade within weeks

Intel's 128 P-core Granite Rapids-AP line is coming soon

www.techradar.com

I checked a few sources. Even the most pessimistic are estimating launch in late 2025 with production in Jan 2026. Most are saying mid 2025. Do you have a source on the 2026 H2 or later?

H2 2025 aligns with TSMC's N2 process release as well:

TSMC on track to begin 2nm chip production in 2025 - Electronics Manufacturing News

Source: FocusTaiwan

www.globalsmt.net

How can they launch in late 2025 if production isn't until 2026...? Usually, production starts a few months prior to the launch. Did you mean production in mid-2025 with launch in late 2025?

 

[Hitman928]

Apparently, some Twitter/X users seem to have nailed the issue. Looks like scheduling which eventually leads to latency due to inadvertent E core scheduling.

https://x.com/CapFrameX/status/1849138027005718775

https://twitter.com/x/status/1849844828789502360

https://twitter.com/x/status/1849852583608975695

Seems like it should be a very easy theory to prove if true. . .

 

[igor_kavinski]

ARL really looks like a mobile processor rebranded as desktop without reasonable optimizations - low bus throughput, low cache throughput, high cache latency... everything goes for saving power.

Maybe turn off ALL power saving features in BIOS? Those C states and anything else that allows the cores to race to idle?

 

[igor_kavinski]

these issues cannot solved by using better memory.

How about slower RAM running at CL24 and tightest subtimings?

 

[Hulk]

I might be coping but this generation is a reset and I will give Intel the benefit of the doubt and believe them.
Hopefully this will turn out like Zen1 and lead to significantly better products in the future.
I bought ARL because I will tune it and it will be as fast or faster than my sold 12900K and 13700K but with more than 50% more MT performance.

I hopfe for Intel's sake that Patherlake or whatever is an iteration that takes the input from the market into account.

I think you are looking at "reset" like I am. Reset in terms of performance expectations in "resetting the bar" in the move from monolithic to tiled and bringing clocks back to reality. As I've been droning on and on about.. Intel worked themselves into a corner by pushing clocks into the stratosphere trying to compete with AMD. Now they are paying the price.

 

[gdansk]

AMD confirms Zen 6 and Zen 6c will arrive in 2025 — but Intel is set to grab the fastest CPU server spot for the first time in a decade within weeks

Intel's 128 P-core Granite Rapids-AP line is coming soon

www.techradar.com

I checked a few sources. Even the most pessimistic are estimating launch in late 2025 with production in Jan 2026. Most are saying mid 2025. Do you have a source on the 2026 H2 or later?

H2 2025 aligns with TSMC's N2 process release as well:

TSMC on track to begin 2nm chip production in 2025 - Electronics Manufacturing News

Source: FocusTaiwan

www.globalsmt.net

My source is myself. Zen 6 is ~22 months after Zen 5 like it was ~22 months after Zen 4 like it was ~22 months after Zen 3.

Some sources also said 2027Q1 but that is so awful I refuse to believe it.

The timing of Panther Lake and Arrow Lake Refresh (if it isn't cancelled) are more open questions.

 

[Saylick]

Re: VBS affecting performance.

This launch has been so bad... There's just no consistency between generations on what settings give you the best performance. What I want to know now is if consumers actually like having to tune their CPU to extract max performance... Maybe it's just me getting older and not having the time, so I start to prefer great performance out of the box. If this trend continues for Intel CPUs where you now need to wait a few months after every launch for Intel, Microsoft, and enthusiasts to figure out what are the Right Settings™, it feels like that would just annoy the consumer.

https://twitter.com/x/status/1849864099875914056

 

[Meteor Late]

Nobody should have to tune anything in order to get good performance, at least better performance than the prior generation. You can do it, but it should never be a necessity.

 

[RTX2080]

How about slower RAM running at CL24 and tightest subtimings?

Well I'm not professional in tuning, but I saw some enthusiasts trying to boost ARL with extreme tuning like memOC, turning on/off settings in BIOS, switching perf profile in windows, OC the ring, and E-cores above 5Ghz, you might have good results but the power consumption is much higher as a consequence. I guess lowering CL doesn't help much.

 

[SiliconFly]

.

 

[igor_kavinski]

Both Intel and AMD need to pressure Microsoft to make it easier for consumers to get the best performance out of their CPUs with a single button click, using whatever chipset drivers or any other solution they can come up with. If Microsoft refuses, Intel/AMD should join forces to create their own official x86 distro to scare the hell out of Microsoft into becoming more humble.

 

[Doug S]

Why would they change the numbering of the cores? That had to be deliberate, but I can't think of any reason why.

Maybe the right question is, where does that numbering come from? Is that something innate to the CPU (i.e. comes from CPUID like instructions) or is it getting that from the BIOS? Or does Windows number them, and something about the way Windows accomplishes that is different - like maybe in past designs at power on/reset first the P cores then the E cores are spun up and identified by the OS but with Arrow Lake they alternate between P and E cores in the order they come online?

 

[Josh128]

Zen 5 had a similar issue during launch. Only after Microsoft fixed it with a Windows patch, things turned out to be fine. Same or similar solution probably applies here.

This is certainly plausible. Even Alder Lake had similar issues at launch, even with its massive IPC upgrade from Rocket Lake/Comet Lake.

Zen 5 and Arrow Lake are so remarkably similar in performance, price, power consumption, and disastrous / embarrassing launches that its almost like Lisa and Pat collaborated on how to make their respective new CPUs baffle folks every step of the way.