Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

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Apr 1, 2022
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Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

Intel Raptor Lake UIntel Wildcat Lake 15W?Intel Lunar LakeIntel Panther Lake 4+0+4
Launch DateQ1-2024Q2-2026Q3-2024Q1-2026
ModelIntel 150UIntel Core 7Core Ultra 7 268VCore Ultra 7 365
Dies2223
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6Intel 18-A + Intel 3 + TSMC N6
CPU2 P-core + 8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-cores4 P-core + 4 LP E-cores
Threads12688
Max Clock5.4 GHz?5 GHz4.8 GHz
L3 Cache12 MB12 MB12 MB
TDP15 - 55 W15 W ?17 - 37 W25 - 55 W
Memory128-bit LPDDR5-520064-bit LPDDR5128-bit LPDDR5x-8533128-bit LPDDR5x-7467
Size96 GB32 GB128 GB
Bandwidth136 GB/s
GPUIntel GraphicsIntel GraphicsArc 140VIntel Graphics
RTNoNoYESYES
EU / Xe96 EU2 Xe8 Xe4 Xe
Max Clock1.3 GHz?2 GHz2.5 GHz
NPUGNA 3.018 TOPS48 TOPS49 TOPS






PPT1.jpg
PPT2.jpg
PPT3.jpg



As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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Markfw

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May 16, 2002
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It's a few % above RPC, where Zen 4 is behind.

BTW have you seen SRF benchmarks? Looks like SRF is now the most efficient X86 server CPU in existence.



Pretty good event for Intel.
What I see in that review is performance per core, but no where do I see performance/watt.
 

adroc_thurston

Diamond Member
Jul 2, 2023
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I wouldn’t call it cheapening out, but it’s a very engineer-y move and not out of line with what Zen was originally named to do: bring a balanced approach to x86 cores
It's still 26% bigger due to the most overkill SIMD implementation in the history of x86.
 

H433x0n

Golden Member
Mar 15, 2023
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You've been literally told to go look at the AT dt RPL review.
I'm talking about SRF perf/watt. You said Phoronix is a mess and doesn't count. Give me another example then.

Edit: I looked at the AT review, there's nothing here to suggest Zen 4 has better IPC than RPL in Specint. What am I missing?
 

Khato

Golden Member
Jul 15, 2001
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Clearly the marketing comparisons of SRF against the high core count AMD offerings will come with SRF-AP. It's not particularly unreasonable to match thread counts rather than core counts and then select the closest TDP option.

The indicators of performance for the SKT core are the real excitement in my opinion. Quite an increase in performance, not to mention performance per watt and area.
 

Hulk

Diamond Member
Oct 9, 1999
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From this slide LNL-MX iGPU seems to be easily faster than MTL-H iGPU at the same power.

Lion Cove might be only 10% faster per clock than Skymont. This is so bad from the big core given how much bigger it is.
I was thinking the same thing but the reality could be that LC gets more like 15% IPC uplift over Skymont and another 20% in frequency, which would be 35% overall. That is significant. Also we don't know the sizes of LC and Skymont at this point, right?
 
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I'm super happy with the results. Lion Cove is definitively mid, Skymont exceeds expectations by a mile. Went from feeling bear-ish about Intel's future to optimistic about the next 2 years.

Intel definitely hangs onto the 1T performance crown for another 2 years.
I’m excited about what Lion Cove represents: a shift to a more agile design capability. The ability to add/remove hyperthreading as needed is pretty interesting as well.
Let me introduce you to my friend AMD EPYC™ Bergamo 9754S.
Is a hyperthreading part, so the comparison would be identical. Hyperscalers see that as a 256 vCPU part lol.

Sierra Forest is looking like Intel’s Yonah moment in servers. Not yet competitive top line from a performance standpoint, but better in power efficiency, and clearly learning the right lessons. CWF will be very interesting.

LNL is a pure win. Arrow Lake unknown. First time I’ve been worried about AMD’s future in a long time.
 

branch_suggestion

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Aug 4, 2023
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I wouldn’t call it cheapening out, but it’s a very engineer-y move and not out of line with what Zen was originally named to do: bring a balanced approach to x86 cores. Using balanced cores (read: high PPA) lets them win in servers, where it matters the most.
For sure, but against cores designed for client that don't need to scale to server platforms, it is clearly wearing thin.
It looks like Z5 spent nearly all the area on FPU and frontend, leaving INT execution, well we shall see how much they changed there, but probably not much.
But I will admit I was really hoping they’d make an x86 version of ARM’s X cores instead of iterating on top of a wildly successful middle core.
Hopefully we get a huge INTmaxx core next time for client.
It's still 26% bigger due to the most overkill SIMD implementation in the history of x86.
I'm honestly wondering what market that FPU is being targeted at?
Z4 did an adequate job there for the most part.
 

gdansk

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Feb 8, 2011
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First time I’ve been worried about AMD’s future in a long time.
🤔 Why? They claim to have beaten Lion Cove team's Intel 7 to N3B IPC gain with only a N5 to N4P shrink, didn't increase area for the CCd, and may not have regressed on clock speed while also doubling the vector throughput. All while keeping TSVs for stacked cache at a later date.
 
Jun 4, 2024
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🤔 Why? They claim to have beaten Lion Cove team's IPC gain with a smaller node shrink, didn't increase area for the CCd, and may not have regressed on clock speed while also doubling the vector throughput.
Because they’re not doing anything new and afraid to take risks. They’ve succumbed to incumbent inertia. Skymont laps them in mobile, and Zen 5 desktop parts are meh. Not pushing core counts, efficiency still way behind Apple/Qualcomm/ and now Intel, despite having access to TSMC. GPUs suck. And this is with a nearly dead Intel.

AMD will continue to dominate servers, but pace of innovations has slowed and that will come down too if something doesn’t change. Competition tends to motivate though.
 

trivik12

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Jan 26, 2006
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So main story is Chadmont. I think Intel E-cores are converging with P-cores brethern and I expect in couple of gen will be more or less same cores operating at different frequencies and different caches.
 

adroc_thurston

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Because they’re not doing anything new and afraid to take risks. They’ve succumbed to incumbent inertia. Skymont laps them in mobile, and Zen 5 desktop parts are meh. Not pushing core counts, efficiency still way behind Apple/Qualcomm/ and now Intel, despite having access to TSMC. GPUs suck. And this is with a nearly dead Intel.

AMD will continue to dominate servers, but pace of innovations has slowed and that will come down too if something doesn’t change. Competition tends to motivate though.
quality FUD, I rate 5.43/10.
I think Intel E-cores are converging with P-cores brethern and I expect in couple of gen will be more or less same cores operating at different frequencies and different caches.
No, they're extremely distinct designs.
 

H433x0n

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Sierra Forest might be the ticket to getting confidence back in Xeon. If GNR over performs expectations similarly to SRF there might be legit competition in x86 DataCenter again.
 
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You've been literally told to go look at the AT dt RPL review.
What are you even talking about. Phoronix gives far more in depth testing for sever parts than post-Ian/Anand Anandtech. I think the bigger issues is it doesn’t currently support your recovery arc. Watching you overcompensate for your epic fail and misdirection of the Zen/Lake forums over the past year is super painful but popcorns out.
 

adroc_thurston

Diamond Member
Jul 2, 2023
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Sierra Forest might be the ticket to getting confidence back in Xeon
It's getting railed according to Intel's own 1st party data. Come on.
1717478394135.png
What are you even talking about. Phoronix gives far more in depth testing for sever parts than post-Ian/Anand Anandtech. I think the bigger issues is it doesn’t currently support your recovery arc. Watching you overcompensate for your epic fail and misdirection of the Zen/Lake forums over the past year is super painful but popcorns out.
This is a bad bait, try harder.
3/10.
 

Saylick

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Sep 10, 2012
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For sure, but against cores designed for client that don't need to scale to server platforms, it is clearly wearing thin.
It looks like Z5 spent nearly all the area on FPU and frontend, leaving INT execution, well we shall see how much they changed there, but probably not much.

Hopefully we get a huge INTmaxx core next time for client.
Well, since those AMD slides are legit, Zen 6 doesn't do much. Bummer.
I'm honestly wondering what market that FPU is being targeted at?
Z4 did an adequate job there for the most part.
It’s for servers, not client. The fact that it’s kept for client is probably for compatibility across the board, but fwiw this “one core fits all” approach is cost and resource efficient for AMD.
 
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