Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

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Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

Intel Alder Lake - NIntel Wildcat LakeIntel Lunar LakeMediatek D9500
Launch DateQ1-2023Q2-2026 ?Q3-2024Q3-2025
ModelIntel N300?Core Ultra 7 268VDimensity 9500 5G
Dies2221
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6TSMC N3P
CPU8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-coresC1 1+3+4
Threads8688
Max Clock3.8 GHz?5 GHz
L3 Cache6 MB?12 MB
TDP7 WFanless ?17 WFanless
Memory64-bit LPDDR5-480064-bit LPDDR5-6800 ?128-bit LPDDR5X-853364-bit LPDDR5X-10667
Size16 GB?32 GB24 GB ?
Bandwidth~ 55 GB/s136 GB/s85.6 GB/s
GPUUHD GraphicsArc 140VG1 Ultra
EU / Xe32 EU2 Xe8 Xe12
Max Clock1.25 GHz2 GHz
NPUNA18 TOPS48 TOPS100 TOPS ?






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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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adroc_thurston

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if you are calling Zen 5 the 'greatest thing since sliced bread' with no specifics
I've called it an Apple-class core a few times.
You can guess the rest, really (there's a pretty evident IPC delta between Zen4 and Avalanche/whatever A16 core is called, they're the same more or less).
I think he's just having fun toying with you.
Ehhhh sorta.
He's a silly little plebbitor and I find those low-key fun.
 
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Exist50

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Aug 18, 2016
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I think he's just having fun toying with you.

You know yourself that not everything should be revealed early before somebody else leaks it elsewhere.
I can certainly believe this is just trolling, but I know there's at least some substance to his claims, so I can't dismiss them entirely. But also a lot of nonsense too. It's an interesting mix that I haven't seen before.

And you've seen me enough on this forum to know I'm not just BSing myself. Hope I've established a little credibility.
 
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moinmoin

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And you've seen me enough on this forum to know I'm not just BSing myself. Hope I've established a little credibility.
You absolutely have, don't worry about that. Just don't take all this too seriously, we'll eventually see how all that play out anyway. :)
 

adroc_thurston

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Jul 2, 2023
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AMD cannot even have a low idle wattage on laptops and desktops unlike Apple and Intel which have low idle wattage.
yea they do, RMB/PHX both idle way way better than any modern Intel part.
Apple has a by far better uncore given their mobile legacy, but it failed to scale-up which is why you have a joke ARM Mac Pro instead of what they've hoped to have initially.
RDNA3 is mid.
The uarch is very solid, the implementation is scuffed as sin.
But they're working on it since STX demands it working as intended.
This just screams "I know nothing but believe my lies"
Ehhh don't do copium this early, it's unhealthy.
Wait a few months, it'll be fine.
 
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S'renne

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Oct 30, 2022
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Haha, fair enough. Though if I need to hear another year of this, might have to borrow @A/// 's coping strategy.
He's giving me the same vibes as MLID on a most probably non existent Royal Cores on his claims on how Zen 5 is the best cores from AMD since XXX along with his supposed insider account on how it now has concrete numbers and somehow has reliable sources with absolutely nothing to back it up or somehow unwilling to(like MLID claimed too), and doesn't have a track record to also give us trust over his info either. He's also completely derailing the purpose of this thread, which is in it's title.

Also, if Zen 5 on the consumer side of things gets charged with a premium on release higher than Zen 4 did on desktop in pricing, then arrives 1 year later on mobile while in really limited stocks would still make it a flop in another way. Meteor Lake is intended to compete on mobile where Golden Cove is still competitive with Zen 4 in raw CPU power but not efficiency and ARC GPU performance for iGPU which Alchemist had caught up in their dGPUs last gen.

If Intel also does release Battlemage on time and is available for mobile with more options that AMD's current mobile GPU lineup, better specs while actually having the drivers to back it up this time to pair with MTL, they'll still be competing as per their intended designs.

TL: DR can we just get back on topic and if you want to gush over Zen 5 there's a whole thread for it..
 

H433x0n

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Mar 15, 2023
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I can certainly believe this is just trolling, but I know there's at least some substance to his claims, so I can't dismiss them entirely. But also a lot of nonsense too. It's an interesting mix that I haven't seen before.

For his claims about Zen 5 to be true, it’d require a lot of extraordinary events to happen. I’ll paraphrase his claims as Turin having a massive performance advantage of 30-50% across a wide range of benchmarks such as database operations, AI, compilation times, virtualization, etc. (i.e. not just SPECint and SPECfp).

I’m not sure if Genoa even beats SPR by that margin and SPR is a full node behind and on a uArch dating back to 2018-2019.
 

adroc_thurston

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Jul 2, 2023
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it’d require a lot of extraordinary events to happen
Ughm what.
It's just good engineering.
I’ll paraphrase his claims as Turin having a massive performance advantage of 30-50% across a wide range of benchmarks such as database operations, AI, compilation times, virtualization, etc. (i.e. not just SPECint and SPECfp).
Yea like that's, well, the selling point.
You get 33% more cores and they're a lot-lot meaner.
But you pay in wattage so there's that.
I’m not sure if Genoa even beats SPR by that margin and SPR is a full node behind and on a uArch dating back to 2018-2019.
it really does which is why SAP just moved to Genoa on GCP.
 
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H433x0n

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it really does which is why SAP just moved to Genoa on GCP.
Benchmarks

In a wide range of workloads it doesn’t outperform it by 30-50%. It smokes it in rendering images sure but it also has a significant clock speed, core count and node advantage.

I’m hardly an SPR fan, to me it represents everything that went wrong with Intel in the 2010’s and the people on that team were handed a horrible position and then lambasted (unfairly IMO) for it. However, your claims are so wild that you managed to overstate SPR’s abysmal performance and that’s no easy feat.
 
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adroc_thurston

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In a wide range of workloads it doesn’t outperform it by 30-50%
Because a whole lot of them are just 1t benches (or generally don't scale out to 192c at all), which Turin will absolutely smoke anyway, kinda the idea, even.
Those high-CC chips aren't really made for that.
I mean, STH had to spin an additional kernel comp instance for their usual Linux kernel compilation bench specifically because of that.
It smokes it in rendering images sure but it also has a significant clock speed, core count and node advantage.
Yeah it smokes it where it matters for end users.
However, your claims are so wild that you managed to overstate SPR’s abysmal performance and that’s no easy feat.
Bro you don't have to cope like that.
Genoa customer traction is very real.
the people on that team were handed a horrible position and then lambasted (unfairly IMO) for it
No they're just incompetent.
CCG guys ship parts without getting stuck in a neverending cycle of validation hell, even if design decisions for MTL/ARL are also kinda questionable.
 

H433x0n

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Mar 15, 2023
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Because a whole lot of them are just 1t benches (or generally don't scale out to 192c at all), which Turin will absolutely smoke anyway, kinda the idea, even.
Those high-CC chips aren't really made for that.
I mean, STH had to spin an additional kernel comp instance for their usual Linux kernel compilation bench specifically because of that.

That’s sort of cherry picking, which is exactly my point. You can’t point to a 30-50% advantage unless you begin hand selecting certain benchmarks that favor your point. Rendering also isn’t a top concern for the clients purchasing these products.

Genoa customer traction is very real.

My interests aren’t data center, I care more about process technology and client products.
 

adroc_thurston

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That’s sort of cherry picking, which is exactly my point
There's no cherry picking, because those high-CC chips aren't made to run singular Python instances.
Rendering also isn’t a top concern for the clients purchasing these products.
yea, it's all VM farms on-prem or in the cloud so duh.
Big customers, hugh volumes, fat margins etc.
I care more about process technology and client products.
Good for you, Intel is doing ok in the former and Lunar-onwards more than okay in the latter (well, I hope).
 

Abwx

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Benchmarks

In a wide range of workloads it doesn’t outperform it by 30-50%. It smokes it in rendering images sure but it also has a significant clock speed, core count and node advantage.

I’m hardly an SPR fan, to me it represents everything that went wrong with Intel in the 2010’s and the people on that team were handed a horrible position and then lambasted (unfairly IMO) for it. However, your claims are so wild that you managed to overstate SPR’s abysmal performance and that’s no easy feat.

In those tests averages the 2 x 96C Epyc hardly beat the 2 x 64C, at this rate you could say as well that SPR is hardly as good as the latter, obviously those tests dont take full advantage of the 2 x 96C core count, if that s what you need to try making a point you d better find something else, this exemple is just ridiculous.

Edit : The 2 x 60C SPR is competitive in thoses tests with the 2 x 64C EPYC but at 2x the power...
 
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adroc_thurston

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this exemple is just ridiculous.
He's being extra silly and trying to downplay modern computing environments those high-CC chips are made for.
They're all endless fields of VMs and containers and VMs and containers aka what things like Genoa or Bergamo or Turins are made for.

Cute but he's not gonna have a good 2024.