Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+0+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[511]

I am still hoping for some tweaks to the cache like they did with Raptor Lake, It might be cope but 12900K -> 13900K is the gain I am hoping for not 13900K -> 14900K, they have two options to surprise me with.

This is not possible imo 12900K to 13900K was a very big improvement the process was improved was.
For Refresh process is out of the question and the cache I doubt it as well they need to tape out another tile on N3B for that they would just improve the D2D/NGU Clocks and claim it a improvement.

 

[gdansk]

Raptor Lake was a different die.
I don't think they're doing a new, bigger die for Arrow Lake Refresh parts.
If it's more than 100-200MHz increase I'll be surprised.

 

[AcrosTinus]

Raptor Lake was a different die.
I don't think they're doing a new, bigger die for Arrow Lake Refresh parts.
If it's more than 100-200MHz increase I'll be surprised.

If this is really what they do, they have zero ambitions or are severely constrained by this meteor lake+ base. For me a real fresh was the Alder to Raptor transition, you got more cores, refined process and a cache tweak. 13th to 14th is basically better binning from the process maturing. I hope they do something more ambitious.

 

[igor_kavinski]

If it's more than 100-200MHz increase I'll be surprised.

AMD is managing 6 GHz on some Zen 5 CCDs already. Even few Zen 4 samples could do 6+ GHz. If Intel manages to do decent DTCO with TSMC N3B, I think 6.2 GHz is within the realm of possibility.

 

[511]

AMD is managing 6 GHz on some Zen 5 CCDs already. Even few Zen 4 samples could do 6+ GHz. If Intel manages to do decent DTCO with TSMC N3B, I think 6.2 GHz is within the realm of possibility.

DTCO means you have to redo part of the design new stepping it is a waste of money on N3B also considering the fact that TSMC Nodes are not Intel nodes with insane GHz potential

 

[igor_kavinski]

DTCO means you have to redo part of the design new stepping it is a waste of money on N3B also considering the fact that TSMC Nodes are not Intel nodes with insane GHz potential

If they don't spend the required money, AMD will be out of the gate first with Zen 6 and Nova Lake is too far out.

 

[511]

If they don't spend the required money, AMD will be out of the gate first with Zen 6 and Nova Lake is too far out.

Wrong both NVL and Zen 6 are like a quarter apart also they can't do anything about ARL vs X3D so it's a waste of resources and stuff.

 

[gdansk]

For me a real fresh was the Alder to Raptor transition, you got more cores, refined process and a cache tweak.

That wasn't a refresh. I think you're looking at this wrong. A refresh is usually like going from the 13900K to 14900K.

 

[511]

Agreed that Alder lake to raptor lake is not a refresh there are many improvements.

 

[igor_kavinski]

also they can't do anything about ARL vs X3D so it's a waste of resources and stuff.

They can. Improve the IMC and cache latency and they can get very competitive vs. X3D.

 

[511]

They can. Improve the IMC and cache latency and they can get very competitive vs. X3D.

They are limited by the the base design so they can't do anything about it now best hope is to nail Nova Lake and Panthe Lake and launch them on time.

 

[igor_kavinski]

best hope is to nail Nova Lake and Panthe Lake and launch them on time.

What are the chances that they are forced to release Panther Lake as high end MoDT to compete better with X3D?

 

[511]

What are the chances that they are forced to release Panther Lake as high end MoDT to compete better with X3D?

0 if you ask me there is no point if anything it will be worse cause than people would think 18A is bad and it is a failure. As i have said the base architecture of the SoC is horrendous.

 

[dullard]

i was being sarcastic over the improvement to NPU as intel choose to focus on this.

0 if you ask me there is no point if anything it will be worse cause than people would think 18A is bad and it is a failure. As i have said the base architecture of the SoC is horrendous.

So in the first quote, you laugh that rumors state that Intel is redoing the SoC tile. Then in the second quote, you say the SoC is horrendous. Which is it?

 

[511]

So in the first quote, you laugh that rumors state that Intel is redoing the SoC tile. Then in the second quote, you say the SoC is horrendous. Which is it?

Both lol the only thing they are focusing is on Improved NPU with new SoC die. 🤮

 

[dullard]

the only thing they are focusing is on Improved NPU with new SoC die. 🤮

Why do you think that?

 

[511]

Why do you think that?

https://twitter.com/x/status/1808621251965169774

 

[igor_kavinski]

Both lol the only thing they are focusing is on Improved NPU with new SoC die. 🤮

Kinda makes sense coz AMD will be entering the foray too with their Gorgon APUs with 50 TOPS at least.

 

[511]

Kinda makes sense coz AMD will be entering the foray too with their Gorgon APUs with 50 TOPS at least.

This is for Desktop no refresh for ARL-H/U it is getting replaced with PTL-H

 

[dullard]

https://twitter.com/x/status/1808621251965169774

That is why you think the NPU will be changed. But, when Intel is changing that SoC tile, why do you think that is the ONLY change to the SoC tile. If the tile is as bad as you claim, and if Intel's strategy is to continually improve tiles to be able to mix/match/reuse and to learn for their next CPUs, then why wouldn't Intel do anything else to it?

 

[igor_kavinski]

This is for Desktop no refresh for ARL-H/U it is getting replaced with PTL-H

I'm assuming Ryzen 9000G will be based on Gorgon Point. Otherwise, it will be a missed chance.

 

[coercitiv]

I'm assuming Ryzen 9000G will be based on Gorgon Point. Otherwise, it will be a missed chance.

Improving the NPU is still an exercise in futility at this point, it does not help short term and is likely to be too little for the future. Same applies to AMD.

I hope the ARL-R desktop SoC sees some MC/latency improvements, that would lift all boats, AI magic tricks included.

 

[igor_kavinski]

Improving the NPU is still an exercise in futility at this point, it does not help short term and is likely to be too little for the future. Same applies to AMD.

If they get our PCs speaking like HAL9000, I think it will be worth it

 

[511]

That is why you think the NPU will be changed. But, when Intel is changing that SoC tile, why do you think that is the ONLY change to the SoC tile. If the tile is as bad as you claim, and if Intel's strategy is to continually improve tiles to be able to mix/match/reuse and to learn for their next CPUs, then why wouldn't Intel do anything else to it?

Yes OFC and as for other part and i doubt they can improve the tile if they can that is a big improvement.

 

[igor_kavinski]

Yes OFC and as for other part and i doubt they can improve the tile if they can that is a big improvement.

Assuming they have already solved some or all of the tile related problems in Panther Lake, it seems logical that they can do something better with the ARL Refresh tiles, unless they decide it's too much work with not enough time.